Cost effective memory dependence prediction using speculation levels and color sets

Memory dependence prediction allows out-of-order issue processors to achieve high degrees of instruction level parallelism by issuing load instructions at the earliest time without causing a significant number of memory order violations. We present a simple mechanism which incorporates multiple speculation levels within the processor and classifies the load and the store instructions at run time to the appropriate speculation level. Each speculation level is termed as a color and the sets of load and store instructions are called color sets. We present how this mechanism can be incorporated into the issue logic of a conventional superscalar processor and show that this simple mechanism can provide similar performance to that of more costly schemes resulting in reduced hardware complexity and cost. The performance of the technique is evaluated with respect to the store set algorithm. At very small table sizes, the color set approach provides up to 21% better performance than the store set algorithm for floating point Spec95 benchmarks and up to 18% better performance for integer benchmarks using harmonic means

Memory Dependence Prediction Methods Study and Improvement Proposals

English: Nowadays, most modern high performance processors employ out-of-order (O3) execution. In these processors, instructions are executed as soon as possible increasing in this way the instruction level parallelism (ILP) and, in consequence, the processor performance. However, not all instructions could be executed in O3 way. Memory access instructions sharing the same memory address must be executed in order to keep the original program semantic. For this reason, O3 processors use memory dependence predictors. These are specialized units in charge of reducing, as much as possible, the number of loads and stores executed in-order. Good predictors aid to release all the ILP potential in O3 processors. This project studies current used (in commercial hardware) and proposed (in academic papers) methods for predicting memory dependencies in an O3 processor. New opportunities to exploit instructions locality and improve predictor¿s accuracy are proposed and tested. In particular, the concept of extreme locality is introduced and applied in a new method, named MiniCAM. The results using this method are presented and discussed