33 research outputs found
Performance of the CMS Pixel Detector at an upgraded LHC
The CMS experiment will include a pixel detector for pattern recognition and
vertexing. It will consist of three barrel layers and two endcaps on each side,
providing three space-points up to a pseudoraditity of 2.1. Taking into account
the expected limitations of its performance in the LHC environment an 8-9 layer
pixel detector for an upgraded LHC is discussed.Comment: Contribution to the 10th European Symposium on Semiconductor
Detectors, June 12 - 16, 2005 in Wildbad Kreuth, Germany. 6 pages, 4 figures,
1 table. Referee's comments implemente
Die-Level Thinning for Flip-Chip Integration on Flexible Substrates
Die-level thinning, handling, and integration of singulated dies from multi-project wafers (MPW) are often used in research, early-stage development, and prototyping of flexible devices. There is a high demand for thin silicon devices for several applications, such as flexible electronics. To address this demand, we study a novel post-processing method on two silicon devices, an electrochemical impedance sensor, and Complementary Metal Oxide Semiconductor (CMOS) die. Both are drawn from an MPW batch, thinned at die-level after dicing and singulation down to 60 µm. The thinned dies were flip-chip bonded to flexible substrates and hermetically sealed by two techniques: thermosonic bonding of Au stud bumps and anisotropic conductive paste (ACP) bonding. The performance of the thinned dies was assessed via functional tests and compared to the original dies. Furthermore, the long-term reliability of the flip-chip bonded thinned sensors was demonstrated to be higher than the conventional wire-bonded sensors
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Microstructural Coarsening during Thermomechanical Fatigue and Annealing of Micro Flip-Chip Solder Joints
Microstructural Coarsening during Thermomechanical Fatigue and Annealing of Micro Flip-Chip Solder Joints
Microstructural evolution due to thermal effects was studied in micro solder joints (55 {+-} 5 {micro}m). The composition of the Sn/Pb solder studied was found to be hypereutectic with a tin content of 65--70 wt%.This was determined by Energy Dispersive X-ray analysis and confirmed with quantitative stereology. The quantitative stereological value of the surface-to-volume ratio was used to characterize and compare the coarsening during thermal cycling from 0--160 C to the coarsening during annealing at 160 C. The initial coarsening of the annealed samples was more rapid than the cycled samples, but tapered off as time to the one-half as expected. Because the substrates to which the solder was bonded have different thermal expansion coefficients, the cycled samples experienced a mechanical strain with thermal cycling. The low-strain cycled samples had a 2.8% strain imposed on the solder and failed by 1,000 cycles, despite undergoing less coarsening than the annealed samples. The high-strain cycled samples experienced a 28% strain and failed between 25 and 250 cycles. No failures were observed in the annealed samples. Failure mechanisms and processing issues unique to small, fine pitch joints are also discussed
A review of advances in pixel detectors for experiments with high rate and radiation
The Large Hadron Collider (LHC) experiments ATLAS and CMS have established
hybrid pixel detectors as the instrument of choice for particle tracking and
vertexing in high rate and radiation environments, as they operate close to the
LHC interaction points. With the High Luminosity-LHC upgrade now in sight, for
which the tracking detectors will be completely replaced, new generations of
pixel detectors are being devised. They have to address enormous challenges in
terms of data throughput and radiation levels, ionizing and non-ionizing, that
harm the sensing and readout parts of pixel detectors alike. Advances in
microelectronics and microprocessing technologies now enable large scale
detector designs with unprecedented performance in measurement precision (space
and time), radiation hard sensors and readout chips, hybridization techniques,
lightweight supports, and fully monolithic approaches to meet these challenges.
This paper reviews the world-wide effort on these developments.Comment: 84 pages with 46 figures. Review article.For submission to Rep. Prog.
Phy
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3D packaging for integrated circuit systems
A goal was set for high density, high performance microelectronics pursued through a dense 3D packing of integrated circuits. A {open_quotes}tool set{close_quotes} of assembly processes have been developed that enable 3D system designs: 3D thermal analysis, silicon electrical through vias, IC thinning, mounting wells in silicon, adhesives for silicon stacking, pretesting of IC chips before commitment to stacks, and bond pad bumping. Validation of these process developments occurred through both Sandia prototypes and subsequent commercial examples
Height inspection of wafer bumps without explicit 3D reconstruction.
by Dong, Mei.Thesis (M.Phil.)--Chinese University of Hong Kong, 2007.Includes bibliographical references (leaves 83-90).Abstracts in English and Chinese.INTRODUCTION --- p.1Chapter 1.1 --- Bump Height Inspection --- p.1Chapter 1.2 --- Our Height Inspection System --- p.2Chapter 1.3 --- Thesis Outline --- p.3BACKGROUND --- p.5Chapter 2.1 --- Wafer Bumps --- p.5Chapter 2.2 --- Common Defects of Wafer Bumps --- p.7Chapter 2.3 --- Traditional Methods for Bump Inspection --- p.11BIPLANAR DISPARITY METHOD --- p.22Chapter 3.1 --- Problem Nature --- p.22Chapter 3.2 --- System Overview --- p.25Chapter 3.3 --- Biplanar Disparity Matrix D --- p.30Chapter 3.4 --- Planar Homography --- p.36Chapter 3.4.1 --- Planar Homography --- p.36Chapter 3.4.2 --- Homography Estimation --- p.39Chapter 3.5 --- Harris Corner Detector --- p.45Chapter 3.6 --- Experiments --- p.47Chapter 3.6.1 --- Synthetic Experiments --- p.47Chapter 3.6.2 --- Real image experiment --- p.52Chapter 3.7 --- Conclusion and problems --- p.61PARAPLANAR DISPARITY METHOD --- p.62Chapter 4.1 --- The Parallel Constraint --- p.63Chapter 4.2 --- Homography estimation --- p.66Chapter 4.3. --- Experiment: --- p.69Chapter 4.3.1 --- Synthetic Experiment: --- p.69Chapter 4.3.2 --- Real Image Experiment: --- p.74CONCLUSION AND FUTURE WORK --- p.80Chapter 5.1 --- Summary of the contributions --- p.80Chapter 5.2 --- Future Work --- p.81Publication related to this work: --- p.83BIBLIOGRAPHY --- p.8
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Using far-field measurements for determining mixed-mode interactions at interfaces
Traction–separation relations (TSR) can be used to represent the interactions at a bimaterial interface during fracture and adhesion. The goal of this work is to develop a direct method to extract mixed-mode TSRs using only the far-field measurements. The first topic of the dissertation deals with extracting mixed-mode TSRs based on a combination of global and local measurements including load-displacement, crack extension, crack tip opening displacement, and fracture resistance curves. Mixed-mode interfacial fracture experiments were conducted using the end loaded split (ELS) configuration for a silicon-epoxy interface, where the epoxy thickness was used to control the phase angle of the fracture mode-mix. Infra-red crack opening interferometry (IR-COI) was used to measure the normal crack opening displacements. For the resistance curves, an approximate value of the J-integral was calculated based on a beam-on-elastic-foundation model that referenced the measured load-displacement data. A damage-based cohesive zone model with mixed-mode TSRs was then adopted in finite element analyses, with the interfacial properties determined directly from the experiments. With the mode-I fracture toughness from a previous study, the model was used to predict mixed-mode fracture of a silicon/epoxy interface for phase angles ranging from -42˚ to 0˚. Additional measurements would be necessary to further extend the reach of the model to mode-II dominant conditions. The second topic of the dissertation addresses characterization of interfacial interactions between copper through-silicon vias (TSV) and silicon substrates. A suitable choice of via length allowed a direct method to be implemented for determining the mode-II traction-separation relation between silicon and copper TSVs. This interface was loaded in a nano-indentation experiment on specimens with pre cracks that were fabricated using focused-ion-beam (FIB) milling. The elastic and plastic properties of the copper vias were characterized from micro-pillar compression experiments and associated finite element analyses. Analytical and numerical models were developed for extracting the parameters of traction-separation relation. The third topic of the dissertation explores a more general approach to directly extract the mixed-mode traction-separation relations using only far-field measurements from laminated beam specimens. Balanced laminated beam configurations were used to conduct the mixed-mode fracture experiment on a silicon-epoxy interface. The far-field measurements included the displacement at the middle of the bottom adherend at a point behind of the crack front, the force-displacement response, and the angle of rotation at the end of the top adherend. With these far-field measurements, the J integrals in mode-I and mode-II could be calculated separately when the ratio between the thickness and the bending stiffness is the same for both the top and bottom adherends. The local separations at the crack tip are also calculated using these far-field measurements. The traction-separation relations are then obtained directly through numerical differentiation of the obtained J integral with respect to the local separations. This method was validated by comparing to the local measurements of normal separation using IR-COI technique. The extracted normal and shear TSR showed decoupled behavior in damage initiation and evolution which indicate that it is impossible to model using potential-based TSRs. A promising attempt was made to subtract out the elastic deformations of the epoxy that was used in this work. This was achieved by conducting a cohesive zone analysis using an extracted pair of normal and shear traction-separation relations for a particular mode-mix without the epoxy between the adherends.Engineering Mechanic