1,804 research outputs found
Control-theoretic dynamic voltage scaling for embedded controllers
For microprocessors used in real-time embedded systems, minimizing power
consumption is difficult due to the timing constraints. Dynamic voltage scaling
(DVS) has been incorporated into modern microprocessors as a promising
technique for exploring the trade-off between energy consumption and system
performance. However, it remains a challenge to realize the potential of DVS in
unpredictable environments where the system workload cannot be accurately
known. Addressing system-level power-aware design for DVS-enabled embedded
controllers, this paper establishes an analytical model for the DVS system that
encompasses multiple real-time control tasks. From this model, a feedback
control based approach to power management is developed to reduce dynamic power
consumption while achieving good application performance. With this approach,
the unpredictability and variability of task execution times can be attacked.
Thanks to the use of feedback control theory, predictable performance of the
DVS system is achieved, which is favorable to real-time applications. Extensive
simulations are conducted to evaluate the performance of the proposed approach.Comment: Accepted for publication in IET Computers and Digital Techniques.
doi:10.1049/iet-cdt:2007011
Energy Management via PI Control for Data Parallel Applications with Throughput Constraints
International audienceThis paper presents a new proportional-integral (PI) controller that sets the operating point of computing tiles in a system on chip (SoC). We address data-parallel applications with throughput constraints. The controller settings are investigated for application configurations with different QoS levels and different buffer sizes. The control method is evaluated on a test chip with four tiles executing a realistic HMAX object recognition application. Experimental results suggest that the proposed controller outperforms the state-of-the-art results: it attains, on average, 25% less number of frequency switches and has slightly higher energy savings. The reduction in number of frequency switches is important because it decreases the involved overhead. In addition, the PI controller meets the throughput constraint in cases where other approaches fail
Temperature Regulation in Multicore Processors Using Adjustable-Gain Integral Controllers
This paper considers the problem of temperature regulation in multicore
processors by dynamic voltage-frequency scaling. We propose a feedback law that
is based on an integral controller with adjustable gain, designed for fast
tracking convergence in the face of model uncertainties, time-varying plants,
and tight computing-timing constraints. Moreover, unlike prior works we
consider a nonlinear, time-varying plant model that trades off precision for
simple and efficient on-line computations. Cycle-level, full system simulator
implementation and evaluation illustrates fast and accurate tracking of given
temperature reference values, and compares favorably with fixed-gain
controllers.Comment: 8 pages, 6 figures, IEEE Conference on Control Applications 2015,
Accepted Versio
Power Management Techniques for Data Centers: A Survey
With growing use of internet and exponential growth in amount of data to be
stored and processed (known as 'big data'), the size of data centers has
greatly increased. This, however, has resulted in significant increase in the
power consumption of the data centers. For this reason, managing power
consumption of data centers has become essential. In this paper, we highlight
the need of achieving energy efficiency in data centers and survey several
recent architectural techniques designed for power management of data centers.
We also present a classification of these techniques based on their
characteristics. This paper aims to provide insights into the techniques for
improving energy efficiency of data centers and encourage the designers to
invent novel solutions for managing the large power dissipation of data
centers.Comment: Keywords: Data Centers, Power Management, Low-power Design, Energy
Efficiency, Green Computing, DVFS, Server Consolidatio
Feedback-Based Admission Control for Firm Real-Time Task Allocation with Dynamic Voltage and Frequency Scaling
Feedback-based mechanisms can be employed to monitor the performance of Multiprocessor Systems-on-Chips (MPSoCs) and steer the task execution even if the exact knowledge of the workload is unknown a priori. In particular, traditional proportional-integral controllers can be used with firm real-time tasks to either admit them to the processing cores or reject in order not to violate the timeliness of the already admitted tasks. During periods with a lower computational power demand, dynamic voltage and frequency scaling (DVFS) can be used to reduce the dissipation of energy in the cores while still not violating the tasks’ time constraints. Depending on the workload pattern and weight, platform size and the granularity of DVFS, energy savings can reach even 60% at the cost of a slight performance degradation
European White Book on Real-Time Power Hardware in the Loop Testing : DERlab Report No. R- 005.0
The European White Book on Real-Time-Powerhardware-in-the-Loop testing is intended to serve as a reference document on the future of testing of electrical power equipment, with specifi c focus on the emerging hardware-in-the-loop activities and application thereof within testing facilities and procedures. It will provide an outlook of how this powerful tool can be utilised to support the development, testing and validation of specifi cally DER equipment. It aims to report on international experience gained thus far and provides case studies on developments and specifi c technical issues, such as the hardware/software interface. This white book compliments the already existing series of DERlab European white books, covering topics such as grid-inverters and grid-connected storag
A Control-Theoretic Design And Analysis Framework For Resilient Hard Real-Time Systems
We introduce a new design metric called system-resiliency which characterizes the maximum unpredictable
external stresses that any hard-real-time performance mode can withstand. Our proposed systemresiliency
framework addresses resiliency determination for real-time systems with physical and hardware
limitations. Furthermore, our framework advises the system designer about the feasible trade-offs between
external system resources for the system operating modes on a real-time system that operates in a
multi-parametric resiliency environment.
Modern multi-modal real-time systems degrade the system’s operational modes as a response to unpredictable
external stimuli. During these mode transitions, real-time systems should demonstrate a reliable
and graceful degradation of service. Many control-theoretic-based system design approaches exist. Although
they permit real-time systems to operate under various physical constraints, none of them allows
the system designer to predict the system-resiliency over multi-constrained operating environment. Our
framework fills this gap; the proposed framework consists of two components: the design-phase and runtime
control. With the design-phase analysis, the designer predicts the behavior of the real-time system for
variable external conditions. Also, the runtime controller navigates the system to the best desired target
using advanced control-theoretic techniques. Further, our framework addresses the system resiliency of
both uniprocessor and multicore processor systems.
As a proof of concept, we first introduce a design metric called thermal-resiliency, which characterizes
the maximum external thermal stress that any hard-real-time performance mode can withstand. We verify
the thermal-resiliency for the external thermal stresses on a uniprocessor system through a physical testbed.
We show how to solve some of the issues and challenges of designing predictable real-time systems that
guarantee hard deadlines even under transitions between modes in an unpredictable thermal environment
where environmental temperature may dynamically change using our new metric.
We extend the derivation of thermal-resiliency to multicore systems and determine the limitations of
external thermal stress that any hard-real-time performance mode can withstand. Our control-theoretic
framework allows the system designer to allocate asymmetric processing resources upon a multicore proiii
cessor and still maintain thermal constraints.
In addition, we develop real-time-scheduling sub-components that are necessary to fully implement our
framework; toward this goal, we investigate the potential utility of parallelization for meeting real-time
constraints and minimizing energy. Under malleable gang scheduling of implicit-deadline sporadic tasks
upon multiprocessors, we show the non-necessity of dynamic voltage/frequency regarding optimality of
our scheduling problem. We adapt the canonical schedule for DVFS multiprocessor platforms and propose
a polynomial-time optimal processor/frequency-selection algorithm.
Finally, we verify the correctness of our framework through multiple measurable physical and hardware
constraints and complete our work on developing a generalized framework
- …