Interleaved Buck Converter with Variable Number of Active Phases and a Predictive Current Sharing Scheme

The efficiency of an interleaved Buck converter is typically low at light load conditions because of the switching losses in each of the switching stages. Improvements in the converter efficiency can be achieved by dynamically changing the number of active phases depending on the load current. This paper addresses the issues related to the transient response of the converter when the number of active phases is changed by a digital control scheme. The problem arises because the current in the individual phases of the interleaved Buck converter will not be equal immediately after the controller has changed the number of active phases. This paper proposes a current equalisation scheme that adjusts the duty cycle of each phase in a manner that ensures equal average inductor current in all active phases in one or two PWM periods. The current equalisation scheme relies on the measurement of the output current and the knowledge of a few converter parameters and it does not require a measurement of the current in each phase. A digital PWM modulator has been designed that allows the current equalisation scheme to work. Simulations and measurements for a four phase interleaved Buck converter are presented and shows that the predictive current equalisation scheme can equalise the phase currents in a single PWM period

An 8-Bit Analog-to-Digital Converter for Battery Operated Wireless Sensor Nodes

Wireless sensing networks (WSNs) collect analog information transduced into the form of a voltage or current. This data is typically converted into a digital representation of the value and transmitted wirelessly using various modulation techniques. As the available power and size is limited for wireless sensor nodes in many applications, a medium resolution Analog-to-Digital Converter (ADC) is proposed to convert a sensed voltage with moderate speeds to lower power consumption. Specifications also include a rail-to-rail input range and minimized errors associated with offset, gain, differential nonlinearity, and integral nonlinearity. To achieve these specifications, an 8-bit successive approximation register ADC is developed which has a conversion time of nine clock cycles. This ADC features a charge scaling array included to achieve minimized power consumption and area by reducing unit capacitance in the digital-to-analog converter. Furthermore, a latched comparator provides fast decisions utilizing positive feedback. The ADC was designed and simulated using Cadence Virtuoso with parasitic extraction over expected operating temperature range of 0 – 85°C. The design was fabricated using TSMC’s 65 nanometer RF GP process and tested on a printed circuit board to verify design specifications. The measured results for the device show an offset and gain error of +7 LSB and 31.1 LSB, respectively, and a DNL range of -0.9 LSB to +0.8 LSB and an INL range of approximately -4.6 LSB to +12 LSB. The INL is much improved in regard to the application of the temperature sensor. The INL for this region of interest is from -3.5 LSB to +2.8 LSB

Active Stability Monitoring and Stability Control of DC Microgrids Using Incremental Continuous Injection

Electrified transportation and integration of renewable energy in the electric power grid requires the use of power electronic converters for integrating different forms of power; from ac to dc, dc to ac, dc to dc, etc. Recent trend towards electrifying automobiles, aircraft and ships, and increasing penetration of renewable energy has increased the required power levels and number of the power electronics converters connected together in a dc microgrid system. Stable operation of these interfacing converters for all operating conditions has been a topic of renewed interest in the last couple of decades. Traditionally, dc microgrids have been designed conservatively to handle the worst case conditions. However, increasing power capacity of emerging dc microgrids causes this conservative design to become cost and size prohibitive, and over-designing causes the system to become slow and unable to handle fast loads such as pulsed power loads, radars etc. To reduce the dependency on passives components and to increase system response speed, recent literature proposed techniques using control so that the system may be designed with smaller filters and guaranteed with system stability. Traditional design of dc microgrids extend the existing stability analysis techniques originally developed to analyze stability of cascaded power converters. This proved to be useful in the design stages for systems with duplicated power sources/loads like in solar systems. However, the existing stability analysis methods are not applicable for online evaluation of stability and for control-based stabilization in a dynamic system with reconfiguration and addition/removal of various kinds of sources and loads. This dissertation first develops a general stability criterion which is easily applicable to complex dc microgrids, and highly suitable for online evaluation of stability. Next, an online stability monitoring system is developed based on the new criterion which uses incremental continuous injection by an existing converter interfacing energy storage in the system and continuously evaluates system stability margin. Furthermore, this dissertation develops an active stability control for dc microgrids which utilizes the evaluation of the continuous monitor and provides additional damping without adding any passive filters. The theory and techniques developed in this dissertation are demonstrated on a lab scale 2 kW dc microgrid

Advanced control system for stand-alone diesel engine driven-permanent magnetic generator sets

The main focus is on the development of an advanced control system for variable speed standalone diesel engine driven generator systems. An extensive literature survey reviews the historical development and previous relevant research work in the fields of diesel engines, electrical machines, power electronic converters, power and electronic systems. Models are developed for each subsystem from mathematical derivations with necessary simplifications made to reduce complexity while retaining the required accuracy. Initially system performance is investigated using simulation models in Matlab/Simulink. The AC/DC/AC power electronic conversion system used employs a voltage controlled dc link. The ac voltage is maintained at constant magnitude and frequency by using a dc-dc converter and a fixed modulation ratio VSI PWM inverter. The DC chopper provides fast control of the output voltage by dealing efficiently with transient conditions. A Variable Speed Fuzzy Logic Core (VSFLC) controller is combined with a classical control method to produce a novel hybrid controller. This provides an innovative variable speed control that responds to both load and speed changes. A new power balance based control strategy is proposed and implemented in the speed controller. Subsequently a novel overall control strategy is proposed to co-ordinate the hybrid variable speed controller and chopper controller to provide overall control for both fast and slow variations of system operating conditions. The control system is developed and implemented in hardware using Xilinx Foundation Express. The VHDL code for the complete control system design is developed and the designs are synthesised and analysed within the Xilinx environment. The controllers are implemented with XC95108-PC84 and XC4010-PC84 to provide a compact and cheap control system. A prototype experimental system is described and test results are obtained that show the combined control strategy to be very effective. The research work makes contributions in the areas of automatic control systems for diesel engine generator sets and CPLD/FPGA application that will benefit manufacturers and consumers.EPSR

FPGA based controller for fuel cell

This dissertation presents a fuel cell controller.A model is developed for Fuel Cell. We mainly deal the control of the fuel cell under a variety of different parameters, and implementation of the control system in an FPGA using VHDL. The output voltage of Fuel Cell is controlled or conditioned by some controllers; it may be digital or analog. Recently, the importance of the PWM has increased as it became an integral part of all the electronics system. There are two basic techniques for PWM generation, analog and digital. The disadvantages of the analog methods are that they are prone to noise, and they change with voltage and temperature change, they suffer changes due to component variation. To overcome the problem, associated with the analog technique, various types of digital technique are available. Implementation of these techniques in VHDL is done

A GaN-Based Synchronous Rectifier with Reduced Voltage Distortion for 6.78 MHz Wireless Power Applications

The call for a larger degree of engineering innovation grows as wireless power transfer increases in popularity. In this thesis, 6.78 MHz resonant wireless power transfer is explained. Challenges in WPT such as dynamic load variation and electromagnetic interference due to harmonic distortion are discussed, and a literature review is conducted to convey how the current state of the art is addressing these challenges.A GaN-based synchronous rectifier is proposed as a viable solution, and a model of the circuit is constructed. The precisely derived model is compared to a linearized model to illustrate the importance of exactness within the model derivation. The model is then used to quantify the design space of circuit parameters Lr and Cr with regard to harmonic distortion, input phase control, and efficiency. Practical design decisions concerning the 6.78 MHz system are explained. These include gate driver choice and mitigation of PCB parasitics. The model is verified with open loop experimentation using a linear power amplifier, FPGA, electronic load, and two function generators. Current zero-crossing sensing is then introduced in order to achieve self-regulation of both the switching frequency and input phase. The details of the FPGA code and sensing scheme used to obtain this closed loop functionality are described in detail. Finally, conclusions are drawn, and future work is identified