Multi‑scale simulations of two dimensional material based devices: the NanoTCAD ViDES suite

NanoTCAD ViDES (Versatile DEvice Simulator) is an open-source suite of computing codes aimed at assessing the operation and the performance of nanoelectronic devices. It has served the computational nanoelectronic community for almost two decades and it is freely available to researchers around the world in its website (http://vides.nanotcad.com), being employed in hundreds of works by many electronic device simulation groups worldwide. We revise the code structure and its main modules and we present the new features directed towards (i) multi-scale approaches exploiting ab-initio electron-structure calculations, aiming at the exploitation of new physics in electronic devices, (ii) the inclusion of arbitrary heterostructures of layered materials to devise original device architectures and operation, and (iii) the exploration of novel low-cost, green technologies in the mesoscopic scale, as, e.g. printed electronics.Università di Pisa within the CRUI-CAREERC PEP2D (contract No. 770047Italian Ministry of Education and Research (MIUR) in the framework of the FoReLab project (Departments of Excellence

Review—Three dimensional zinc oxide nanostructures as an active site platform for biosensor: Recent trend in healthcare diagnosis

Morphology effect is one of the essential factors that influence the performance of electrochemical biosensors based on ZnO nanostructures. These nanostructures are characterized by anisotropic growth with different dimensionalities such as zerodimensional, one-dimensional, and two-dimensional. More interestingly, when combining each dimension into another advanced dimensionality, i.e. the three-dimensional (3-D), exceptional properties can be generated that are not otherwise found in low dimensionalities. The outstanding popularity of 3-D ZnO stems from many factors, with one of the most important being its synergic advantages from its low dimensional sub-unit and the additional surface area of the 3-D structure due to an increased geometric volume. This review briefly describes the principles and growth mechanism factors of 3-D ZnO via solution-based approaches and additional advanced methods. The paper further expands on the latest advancement of research into the 3-D ZnO nanostructure-based electrochemical biosensors to detect biomolecules that harm humankind. We also discussed the analytical performance of these biosensors using different nanocomposite materials. Additionally, limitations and suggestions on particular sensing works are proposed. Lastly, the five-year progress in research into 3-D ZnO-based electrochemical biosensors’ performance in healthcare diagnosis is compared and future challenges presente

Modeling and simulation of strained graprene nanoribbon field effect transistor

Stretching technique used in material fundamental is not a new technology. It has been adopted in silicon industry to overcome the limitations arisen by scaling down the size of the conventional metal oxide semiconductor Field Effect Transistor (FET). This technique is known as strain technology. As the semiconductor industry grows in their maturity, the replacement of strained silicon with another material offering a higher potential quasi-ballistic-carrier velocity and higher mobility is importance. Recent enlisted superior material is quasi-one dimensional Graphene NanoRibbons (GNR). GNR is the most promising material for future nanoelectronic that inherited most properties from graphene and Carbon NanoTube (CNT) itself. To characterize the effect made by strain technology in silicon, an analytical model of strained GNRFET is presented in this work to analyse the suitability of this material for future FET. This works presents a simple model of current-voltage characteristic in the function of strain for different widths. By using a tight-binding approximation and analytical solution, the strained GNR bandstructure, density of states and carrier statistic are presented. Further observation on their carrier transport and their current-voltage characteristic is also investigated and presented in this research. It is found in this research that strain gives significant effect according to different width groups. It is successful in tailoring the energy gap and linearly changing the carrier statistic and carrier transport. In terms of physical and electrical performance, strained 3m+1 GNR is found to be a good material for future FET with enhanced mobility due to the energy gap alteration by strain. Strained GNRFET also was found to be 55mV/dec in subthreshold slope, which is smaller than normal GNRFET, which means the transistor has faster switching. Besides, the currentvoltage characteristic is reported to have delayed saturation region compared to published model due to the different in quantum effect consideration

Charge-based compact model of gate-all-around floating gate nanowire with variable oxide thickness for flash memory cell

Due to high gate electrostatic control and introduction of punch and plug process technology, the gate-all-around (GAA) transistor is very promising in, and apparently has been utilized for, flash memory applications. However, GAA Floating Gate (GAA-FG) memory cell still requires high programming voltage that may be susceptible to cell-to-cell interference. Scaling down the tunnel oxide can reduce the Program/Erase (P/E) voltage but degrades the data retention capability. By using Technology-Computer-Aided-Design (TCAD) tools, the concept of tunnel barrier engineering using Variable Oxide Thickness (VARIOT) of low-k/high-k stack is utilized in compensating the trade-off between P/E operation and retention characteristics. Four high-k dielectrics (Si3N4, Al2O3, HfO2 and ZrO2) that are commonly used in semiconductor process technology are examined with SiO2 as its low-k dielectric. It is found that by using SiO2/Al2O3 as the tunnel layer, both the P/E and retention characteristics of GAA-FG can be compensated. About 30% improvement in memory window than conventional SiO2 is obtained and only 1% of charge-loss is predicted after 10 years of applying gate stress of -3.6V. Compact model of GAA-FG is initiated by developing a continuous explicit core model of GAA transistor (GAA Nanowire MOSFET (GAANWFET) and Juntionless Nanowire Transitor (JNT)). The validity of the theory and compact model is identified based on sophisticated numerical TCAD simulator for under 10% maximum error of surface potential. It is revealed that with the inclusion of partial-depletion conduction, the accuracy of the core model for GAANWFET is improved by more than 50% in the subthreshold region with doping-geometry ratio can be as high as about 0.86. As for JNT, despite the model being accurate for doping-geometry ratio upto 0.6, it is also independent of fitting parameters that may vary under different terminal biases or doping-geometry cases. The compact model of GAA-FG is completed by incorperating Charge Balance Model (CBM) into GAA transistor core model where good agreement is obtained with TCAD simulation and published experimental work. The CBM gives better accuracy than the conventional capacitive coupling approach under subthreshold region with approximately 10% error of floating gate potential. Therefore, the proposed compact model can be used to assist experimental work in extracting experimental data