Microprogramming a Writeable Control Memory using Very Long Instruction Word (VLIW) Compilation Techniques

Microprogrammed Digital Signal Processors (DSP) are frequently used as a solution to embedded processor applications. These processors utilize a control memory which permits execution of the processor\u27s instruction set architecture (ISA). The control memory can take the form of a static, read only memory (ROM) or a dynamic, writeable control memory (WCM), or both. Microcoding the WCM permits redefining the processor\u27s ISA and provides speedup due to its instruction level parallelism (ILP) potential. In the past, code generation efforts for microprogrammable processors focused on creating assembly and microcode as two separate steps. In this thesis an alternative approach was chosen which combines the separate code generation steps into one automated, dual-target compilation process using the advanced techniques of VLIW compiler technology. The architecture chosen for this effort is a microprogrammable DSP being developed by Rome Labs, New York. The prototype compiler developed in this effort has demonstrated the potential for speedup of microcoded program portions over their assembly code counterparts. Therefore, the feasibility of program speedup produced by a dual-target compiler using VLIW compilation techniques has been validated

Retargetable Compilers for Embedded DSPs

Programmable devices are a key technology for the design of embedded systems, such as in the consumer electronics market. Processor cores are used as building blocks for more and more embedded system designs, since they provide a unique combination of features: flexibility and reusability. Processor-based design implies that compilers capable of generating efficient machine code are necessary. However, highly efficient compilers for embedded processors are hardly available. In particular, this holds for digital signal processors (DSPs). This contribution is intended to outline different aspects of DSP compiler technology. First, we cover demands on compilers for embedded DSPs, which are partially in sharp contrast to traditional compiler construction. Secondly, we present recent advances in DSP code optimization techniques, which explore a comparatively large search space in order to achieve high code quality. Finally, we discuss the different approaches to retargetability of compilers, that is, techniques for automatic generation of compilers from processor models

DSP implementation of digital pre-distortion in wireless communication systems

This paper presents a Digital Signal Processor (DSP) implementation of Digital Pre-distortion (DPD) targeting the 3rd Generation/4th Generation (3G/4G) wireless networks. The non-linearity of the Power Amplifier (PA) causes several issues such as Adjacent Channel Interference (ACI), power wastage, high energy consumption, and system inefficiency. These shortcomings result in performance limitation for the wireless communications system which is undesirable for the industry. DPD is chosen as the PA linearization method due to its overall advantages in Adjacent Channel Power Reduction (ACPR), cost, efficiency, and implementation flexibility. The DPD system is developed using the C++ Hardware Programming Language in order to be implemented into the target Digital Signal Processor (DSP), the soft-core Microblaze processor by Xilinx. The developed system in C++ is compared with the conventional Matlab Simulation and a performance difference of 0-10dB in ACPR is observed. The C++ DSP Implementation is capable of achieving up to 15dB of ACPR for WiMAX signal in 4G networks and 25dB for 2-carrier Wideband Code Division Multiple Access (2C-WCDMA) signals in 3G networks

Advanced Power Electronic Interfaces for Distributed Energy Systems, Part 2: Modeling, Development, and Experimental Evaluation of Advanced Control Functions for Single-Phase Utility-Connected Inverter

Integrating renewable energy and distributed generations into the Smart Grid architecture requires power electronic (PE) for energy conversion. The key to reaching successful Smart Grid implementation is to develop interoperable, intelligent, and advanced PE technology that improves and accelerates the use of distributed energy resource systems. This report describes the simulation, design, and testing of a single-phase DC-to-AC inverter developed to operate in both islanded and utility-connected mode. It provides results on both the simulations and the experiments conducted, demonstrating the ability of the inverter to provide advanced control functions such as power flow and VAR/voltage regulation. This report also analyzes two different techniques used for digital signal processor (DSP) code generation. Initially, the DSP code was written in C programming language using Texas Instrument's Code Composer Studio. In a later stage of the research, the Simulink DSP toolbox was used to self-generate code for the DSP. The successful tests using Simulink self-generated DSP codes show promise for fast prototyping of PE controls

Digital signal processing: the impact of convergence on education, society and design flow

Design and development of real-time, memory and processor hungry digital signal processing systems has for decades been accomplished on general-purpose microprocessors. Increasing needs for high-performance DSP systems made these microprocessors unattractive for such implementations. Various attempts to improve the performance of these systems resulted in the use of dedicated digital signal processing devices like DSP processors and the former heavyweight champion of electronics design – Application Specific Integrated Circuits. The advent of RAM-based Field Programmable Gate Arrays has changed the DSP design flow. Software algorithmic designers can now take their DSP algorithms right from inception to hardware implementation, thanks to the increasing availability of software/hardware design flow or hardware/software co-design. This has led to a demand in the industry for graduates with good skills in both Electrical Engineering and Computer Science. This paper evaluates the impact of technology on DSP-based designs, hardware design languages, and how graduate/undergraduate courses have changed to suit this transition