FPGA Implementation of Spectral Subtraction for In-Car Speech Enhancement and Recognition

The use of speech recognition in noisy environments requires the use of speech enhancement algorithms in order to improve recognition performance. Deploying these enhancement techniques requires significant engineering to ensure algorithms are realisable in electronic hardware. This paper describes the design decisions and process to port the popular spectral subtraction algorithm to a Virtex-4 field-programmable gate array (FPGA) device. Resource analysis shows the final design uses only 13% of the total available FPGA resources. Waveforms and spectrograms presented support the validity of the proposed FPGA design

CMAC spectral subtraction for speech enhancement

One of the major problems in speech signal enhancement and cancellation of additive noise is the availability of a reference signal. A comprehensive and efficient technique for speech enhancement based an extension of the spectral subtraction method is developed. In our proposed model, enhancement is achieved by using a class of associative memory based on the cerebellar model arithmetic computer (CMAC) as a robust method to estimate the reference signal. CMAC can learn very fast and it can approximate a wide variety of non-linear functions. Thus the learning algorithm of CMAC can be integrated with the spectral subtraction method to produce a system that allows the noise estimate to be learned adaptively. The effectiveness of the architecture is demonstrated on a speech corrupted with very low signal to noise ratio (from -5db to -20db) on a vehicular environment