Approximate logic synthesis: a survey

Approximate computing is an emerging paradigm that, by relaxing the requirement for full accuracy, offers benefits in terms of design area and power consumption. This paradigm is particularly attractive in applications where the underlying computation has inherent resilience to small errors. Such applications are abundant in many domains, including machine learning, computer vision, and signal processing. In circuit design, a major challenge is the capability to synthesize the approximate circuits automatically without manually relying on the expertise of designers. In this work, we review methods devised to synthesize approximate circuits, given their exact functionality and an approximability threshold. We summarize strategies for evaluating the error that circuit simplification can induce on the output, which guides synthesis techniques in choosing the circuit transformations that lead to the largest benefit for a given amount of induced error. We then review circuit simplification methods that operate at the gate or Boolean level, including those that leverage classical Boolean synthesis techniques to realize the approximations. We also summarize strategies that take high-level descriptions, such as C or behavioral Verilog, and synthesize approximate circuits from these descriptions

MIDAS: Mutual Information Driven Approximate Synthesis

Applications ranging from the Internet of Things (IoT) to high-performance computing demand energy-efficient hardware for processing and storage. Reducing computation accuracy has shown the potential to achieve high energy efficiency in hardware implementations. In recent years, several automatic approximate logic synthesis techniques have been proposed to build an approximate circuit systematically, trading off accuracy for hardware cost. In this paper, we propose a novel approximate logic synthesis technique to simplify circuits using mutual information by considering the input distribution. Our experimental result shows that our proposed methodology demonstrates improvements in terms of area, delay, and error compared to the state-of-the-art

Partition and propagate: an error derivation algorithm for the design of approximate circuits

Inexact hardware design techniques have become popular in error-tolerant systems, where energy efficiency is a primary concern. Several techniques aim to identify circuit portions that can be discarded under an error constraint, but research on systematic methods to determine such error is still at an early stage. We herein illustrate a generic, scalable algorithm that determines the influence of each circuit gate on the final output. The algorithm first partitions the graph representing the circuit, then determines the error propagation model of the resulting subgraphs. When applied to existing approximate design frameworks, our solution improves their efficiency and result quality

Approximate In-memory computing on RERAMs

Computing systems have seen tremendous growth over the past few decades in their capabilities, efficiency, and deployment use cases. This growth has been driven by progress in lithography techniques, improvement in synthesis tools, architectures and power management. However, there is a growing disparity between computing power and the demands on modern computing systems. The standard Von-Neuman architecture has separate data storage and data processing locations. Therefore, it suffers from a memory-processor communication bottleneck, which is commonly referred to as the \u27memory wall\u27. The relatively slower progress in memory technology compared with processing units has continued to exacerbate the memory wall problem. As feature sizes in the CMOS logic family reduce further, quantum tunneling effects are becoming more prominent. Simultaneously, chip transistor density is already so high that all transistors cannot be powered up at the same time without violating temperature constraints, a phenomenon characterized as dark-silicon. Coupled with this, there is also an increase in leakage currents with smaller feature sizes, resulting in a breakdown of \u27Dennard\u27s\u27 scaling. All these challenges cannot be met without fundamental changes in current computing paradigms. One viable solution is in-memory computing, where computing and storage are performed alongside each other. A number of emerging memory fabrics such as ReRAMS, STT-RAMs, and PCM RAMs are capable of performing logic in-memory. ReRAMs possess high storage density, have extremely low power consumption and a low cost of fabrication. These advantages are due to the simple nature of its basic constituting elements which allow nano-scale fabrication. We use flow-based computing on ReRAM crossbars for computing that exploits natural sneak paths in those crossbars. Another concurrent development in computing is the maturation of domains that are error resilient while being highly data and power intensive. These include machine learning, pattern recognition, computer vision, image processing, and networking, etc. This shift in the nature of computing workloads has given weight to the idea of approximate computing , in which device efficiency is improved by sacrificing tolerable amounts of accuracy in computation. We present a mathematically rigorous foundation for the synthesis of approximate logic and its mapping to ReRAM crossbars using search based and graphical methods

Combining modified Graeb score and intracerebral hemorrhage score to predict poor outcome in patients with spontaneous intracerebral hemorrhage undergoing surgical treatment

ObjectiveSpontaneous intracerebral hemorrhage (sICH) is a frequently encountered neurosurgical disease. The purpose of this study was to evaluate the relationship between modified Graeb Score (mGS) at admission and clinical outcomes of sICH and to investigate whether the combination of ICH score could improve the accuracy of outcome prediction.MethodsWe retrospectively reviewed the medical records of 511 patients who underwent surgery for sICH between January 2017 and June 2021. Patient outcome was evaluated by the Glasgow Outcome Scale (GOS) score at 3 months following sICH, where a GOS score of 1–3 was defined as a poor prognosis. Univariate and multivariate logistic regression analyses were conducted to determine risk factors for unfavorable clinical outcomes. Receiver operating characteristic (ROC) curve analysis was performed to detect the optimal cutoff value of mGS for predicting clinical outcomes. An ICH score combining mGS was created, and the performance of the ICH score combining mGS was assessed for discriminative ability.ResultsMultivariate analysis demonstrated that a higher mGS score was an independent predictor for poor prognosis (odds ratio [OR] 1.207, 95% confidence interval [CI], 1.130–1.290, p < 0.001). In ROC analysis, an optimal cutoff value of mGS to predict the clinical outcome at 3 months after sICH was 11 (p < 0.001). An increasing ICH-mGS score was associated with increased poor functional outcome. Combining ICH score with mGS resulted in an area under the curve (AUC) of 0.790, p < 0.001.ConclusionmGS was an independent risk factor for poor outcome and it had an additive predictive value for outcome in patients with sICH. Compared with the ICH score and mGS alone, the ICH score combined with mGS revealed a significantly higher discriminative ability for predicting postoperative outcome

Recovery in cognitive motor dissociation after severe brain injury: A cohort study.

To investigate the functional and cognitive outcomes during early intensive neurorehabilitation and to compare the recovery patterns of patients presenting with cognitive motor dissociation (CMD), disorders of consciousness (DOC) and non-DOC. We conducted a single center observational cohort study of 141 patients with severe acquired brain injury, consecutively admitted to an acute neurorehabilitation unit. We divided patients into three groups according to initial neurobehavioral diagnosis at admission using the Coma Recovery Scale-Revised (CRS-R) and the Motor Behavior Tool (MBT): potential clinical CMD, [N = 105]; DOC [N = 19]; non-DOC [N = 17]). Functional and cognitive outcomes were assessed at admission and discharge using the Glasgow Outcome Scale, the Early Rehabilitation Barthel Index, the Disability Rating Scale, the Rancho Los Amigos Levels of Cognitive Functioning, the Functional Ambulation Classification Scale and the modified Rankin Scale. Confirmed recovery of conscious awareness was based on CRS-R criteria. CMD patients were significantly associated with better functional outcomes and potential for improvement than DOC. Furthermore, outcomes of CMD patients did not differ significantly from those of non-DOC. Using the CRS-R scale only; approximatively 30% of CMD patients did not recover consciousness at discharge. Our findings support the fact that patients presenting with CMD condition constitute a separate category, with different potential for improvement and functional outcomes than patients suffering from DOC. This reinforces the need for CMD to be urgently recognized, as it may directly affect patient care, influencing life-or-death decisions