Introduction to the special issue on Radio Frequency Integrated Circuits (RFIC) design techniques

Peer reviewe

An automated design methodology of RF circuits by using Pareto-optimal fronts of EMsimulated inductors

A new design methodology for radiofrequency circuits is presented that includes electromagnetic (EM) simulation of the inductors into the optimization flow. This is achieved by previously generating the Pareto-optimal front (POF) of the inductors using EM simulation. Inductors are selected from the Pareto front and their S-parameter matrix is included in the circuit netlist that is simulated using an RF simulator. Generating the EM-simulated POF of inductors is computationally expensive, but once generated, it can be used for any circuit design. The methodology is illustrated both for a singleobjective and a multiobjective optimization of a low noise amplifierMinisterio de Economía y Competitividad TEC2013-45638-C3-3-R, TEC2013-40430-RJunta de Andalucía PIC12-TIC-1481Consejo Superior de Investigaciones Científicas 201350E05

A Wide Tuning-Range mm-Wave LC-VCO Sized Using Evolutionary Algorithms

Designing a LC Voltage Controlled Oscillator (LC-VCO) for mm-Wave frequencies requires a careful balance of interdependent design parameters. The losses due to passive elements dictate the required cross coupled pair transconductance (g m ), which in turn affects the tuning range via fixed capacitance. As such, the design process requires significant engineering time. An optimization methodology using a genetic algorithm is proposed to optimize component selection for use in the LC-VCO. The design for the LC-VCO is broken into pseudo-independent sub-modules to allow the designer greater control and to allow the optimization to benefit from manual circuit intuition. Performance of the components chosen by the genetic algorithm is verified using a circuit simulator to achieve a center frequency of 29 GHz with a 15.8 GHz tuning range. The simulated phase noise performance is -103.2 dBc/Hz using a 10 MHz frequency offset.A one-year embargo was granted for this item.Academic Major: Electrical and Computer Engineerin