Lightweight Error Correction Coding for System-Level Interconnects

Lightweight hierarchical error control coding (LHECC) is a new class of nonlinear block codes that is designed to increase noise immunity and decrease error rate for high-performance chip-to-chip and on-chip interconnects. LHECC is designed such that its corresponding encoder and decoder logic may be tightly integrated into compact, high-speed, and low-latency I/O interfaces. LHECC operates over a new channel technology called multi-bit differential signaling (MBDS). MBDS channels utilize a physical-layer channel code called N choose M (nCm) encoding, where each channel is restricted to a symbol set such that half of the bits in each symbol are set to one. These symbol sets have properties that are utilized by LHECC to achieve error correction capability while requiring low or zero relative information overhead. In addition, these codes may be designed such that the latency and size of the corresponding decoders are tightly bounded. The effectiveness of these codes is demonstrated by modeling error behavior of MBDS interconnects over a range of transmission rates and noise characteristics

Charactterization of Mulit-Bit Differential Channels: A Modified Modal Scattering Parameter Approach

High speed inter-chip interconnects have reached and exceeded the multi-gigabit per second benchmark using differential signaling. Multi-bit differential signaling (MBDS) has been proposed as a solution to the 2n per n bit pin requirement of classical differential channels. MBDS does not currently have a modal characterization similar to the common and differential mode analysis developed for differential signaling that would allow a description of MBDS channel behavior. This thesis introduces a modal characterization of MBDS links via the development of modal scattering parameters that allow the analysis of the communications channel. Simulation results are presented in conjunction with data collected from a fabricated printed circuit board designed for MBDS links. Multiple printed circuit board layouts are be presented for analysis and design comparison. It is shown that the performance of MBDS links can be severely impacted by unoptimized PCB layout