268,128 research outputs found

    Efficient utilization of graphics technology for space animation

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    Efficient utilization of computer graphics technology has become a major investment in the work of aerospace engineers and mission designers. These new tools are having a significant impact in the development and analysis of complex tasks and procedures which must be prepared prior to actual space flight. Design and implementation of useful methods in applying these tools has evolved into a complex interaction of hardware, software, network, video and various user interfaces. Because few people can understand every aspect of this broad mix of technology, many specialists are required to build, train, maintain and adapt these tools to changing user needs. Researchers have set out to create systems where an engineering designer can easily work to achieve goals with a minimum of technological distraction. This was accomplished with high-performance flight simulation visual systems and supercomputer computational horsepower. Control throughout the creative process is judiciously applied while maintaining generality and ease of use to accommodate a wide variety of engineering needs

    Efficient Synapse Memory Structure for Reconfigurable Digital Neuromorphic Hardware

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    Spiking Neural Networks (SNNs) have high potential to process information efficiently with binary spikes and time delay information. Recently, dedicated SNN hardware accelerators with on-chip synapse memory array are gaining interest in overcoming the limitations of running software-based SNN in conventional Von Neumann machines. In this paper, we proposed an efficient synapse memory structure to reduce the amount of hardware resource usage while maintaining performance and network size. In the proposed design, synapse memory size can be reduced by applying presynaptic weight scaling. In addition, axonal/neuronal offsets are applied to implement multiple layers on a single memory array. Finally, a transposable memory addressing scheme is presented for faster operation of spike-timing-dependent plasticity (STDP) learning. We implemented a SNN ASIC chip based on the proposed scheme with 65 nm CMOS technology. Chip measurement results showed that the proposed design provided up to 200X speedup over CPU while consuming 53 mW at 100 MHz with the energy efficiency of 15.2 pJ/SOP.110Ysciescopu

    Design of Low Cost Greenhouse Monitoring using ZigBee Technology

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    Greenhouses are often used for growing flowers, vegetables, fruits, and tobacco plants. Most greenhouse systems still use the manual system in monitoring the temperature and humidity in the greenhouse, a lot of problems can occur not for worker but also affected production rate because the temperature and humidity of the greenhouse must be constantly monitored to ensure optimal conditions. The Wireless Sensor Network (WSN) can be used to gather the data from point to point to trace down the local climate parameters in different parts of the big greenhouse to make the greenhouse automation system work properly. This paper presents the design of low cost greenhouse monitoring system to monitor a greenhouse temperature and humidity parameters by applying the ZigBee technology as the WSN system. During the design process, Peripheral Interface Controller (PIC), LCD Display and Zigbee as the main hardware components is used as hardware components while C compiler and MP Lab IDE were used for software elements. The data from the greenhouse was measured by the sensor then the data will be displayed on the LCD screen on the receiver which support up to 100 m range. By using this system, the process of monitoring is easier and it also cheaper for installation and maintenance. The feasibility of the developed node was tested by deploying a simple sensor network into the Agriculture Department of Melaka Tengah greenhouse in Malaysia

    Development of Greenhouse Monitoring using Wireless Sensor Network through ZigBee Technology

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    Greenhouses are often used for growing flowers, vegetables, fruits, and tobacco plants. Most greenhouse systems still use the manual system in monitoring the temperature and humidity in the greenhouse, a lot of problems can occur not for worker but also affected production rate because the temperature and humidity of the greenhouse must be constantly monitored to ensure optimal conditions. The Wireless Sensor Network (WSN) can be used to gather the data from point to point to trace down the local climate parameters in different parts of the big greenhouse to make the greenhouse automation system work properly. This paper presents the design of low cost greenhouse monitoring system to monitor a greenhouse temperature and humidity parameters by applying the ZigBee technology as the WSN system. During the design process, Peripheral Interface Controller (PIC), LCD Display and Zigbee as the main hardware components is used as hardware components while C compiler and MP Lab IDE were used for software elements. The data from the greenhouse was measured by the sensor then the data will be displayed on the LCD screen on the receiver which support up to 100 m range. By using this system, the process of monitoring is easier and it also cheaper for installation and maintenance. The feasibility of the developed node was tested by deploying a simple sensor network into the Agriculture Department of Melaka Tengah greenhouse in Malaysia

    Investigation on the Benefits of Safety Margin Improvement in CANDU Nuclear Power Plant Using an FPGA-based Shutdown System

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    The relationship between response time and safety margin of CANadian Deuterium Uranium (CANDU) nuclear power plant (NPP) is investigated in this thesis. Implementation of safety shutdown system using Field Programmable Gate Array (FPGA) is explored. The fast data processing capability of FPGAs shortens the response time of CANDU shutdown systems (SDS) such that the impact of accident transient can be reduced. The safety margin, which is closely related to the reactor behavior in the event of an accident, is improved as a result of such a faster shutdown process. Theoretical analysis based on neutron dynamic theory is carried out to establish the fact that a faster shutdown process can mitigate accidental consequences. To provide more realistic test cases from a thermalhydraulic perspective, an industry grade simulation tool known as CATHENA is used to generate comparable accident-shutdown transients for different SDS response times. Results from both verification methods explicitly prove the feasibility of improving the safety margin via faster shutdown process. To demonstrate this concept, a prototype of the proposed faster SDS is constructed. The trip logic of CANDU shutdown system No.1 (SDS1) is converted into a digital hardware design and implemented within chosen FPGA platform. The functionality of the FPGA-based SDS1 is implemented, and the response times are tested and compared to those of the existing CANDU SDS1. The achieved 10.5 ms response time of the FPGA-based SDS1 is again applied to the CATHENA simulation process to quantitatively present the 26.98% improvement in the safety margin. To investigate potential improvement in safety margin by using FPGA technology, hardware-in-the-loop (HIL) simulation is performed by connecting the FPGA-based SDS1 to an NPP training simulator. The 6.26% improvement in safety margin has been verified, based on which a 10% potential power upgrade is discussed as another benefit of applying FPGA technology to CANDU NPPs

    Performance of a Water Recirculation Loop Maintenance Device and Process for the Advanced Spacesuit Water Membrane Evaporator

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    A water loop maintenance device and process to maintain the water quality of the Advanced Spacesuit Water Membrane Evaporation (SWME) water recirculation loop has been undergoing a performance evaluation. The SWME is a heat rejection device under development at the NASA Johnson Space Center to perform thermal control for advanced spacesuits. One advantage to this technology is the potential for a significantly greater degree of tolerance to contamination when compared to the existing Sublimator technology. The driver for the water recirculation maintenance device and process is to further enhance this advantage through the leveraging of fluid loop management lessons-learned from the International Space Station (ISS). A bed design that was developed for a Hamilton Sundstrand military application, and considered for a potential ISS application with the Urine Processor Assembly, provides a low pressure drop means for water maintenance in a recirculation loop. The bed design is coupled with high capacity ion exchange resins, organic adsorbents, and a cyclic methodology developed for the Extravehicular Mobility Unit (EMU) Transport Water loop. The maintenance process further leverages a sorbent developed for ISS that introduces a biocide in a microgravity-compatible manner for the Internal Active Thermal Control System (IATCS). The leveraging of these water maintenance technologies to the SWME recirculation loop is a unique demonstration of applying the valuable lessons learned on the ISS to the next generation of manned spaceflight Environmental Control and Life Support System (ECLSS) hardware. Thi

    Layered architecture for quantum computing

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    We develop a layered quantum computer architecture, which is a systematic framework for tackling the individual challenges of developing a quantum computer while constructing a cohesive device design. We discuss many of the prominent techniques for implementing circuit-model quantum computing and introduce several new methods, with an emphasis on employing surface code quantum error correction. In doing so, we propose a new quantum computer architecture based on optical control of quantum dots. The timescales of physical hardware operations and logical, error-corrected quantum gates differ by several orders of magnitude. By dividing functionality into layers, we can design and analyze subsystems independently, demonstrating the value of our layered architectural approach. Using this concrete hardware platform, we provide resource analysis for executing fault-tolerant quantum algorithms for integer factoring and quantum simulation, finding that the quantum dot architecture we study could solve such problems on the timescale of days.Comment: 27 pages, 20 figure

    Integration of virtual reality within the built environment curriculum

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    Virtual Reality (VR) technology is still perceived by many as being inaccessible and cost prohibitive with VR applications considered expensive to develop as well as challenging to operate. This paper reflects on current developments in VR technologies and describes an approach adopted for its phased integration into the academic curriculum of built environment students. The process and end results of implementing the integration are discussed and the paper illustrates the challenges of introducing VR, including the acceptance of the technology by academic staff and students, interest from industry, and issues pertaining to model development. It sets out to show that fairly sophisticated VR models can now be created by non-VR specialists using commercially available software and advocates that the implementation of VR will increase alongside industryis adoption of these tools and the emergence of a new generation of students with VR skills. The study shows that current VR technologies, if integrated appropriately within built environment academic programmes, demonstrate clear promise to provide a foundation for more widespread collaborative working environments

    A Platform-Based Software Design Methodology for Embedded Control Systems: An Agile Toolkit

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    A discrete control system, with stringent hardware constraints, is effectively an embedded real-time system and hence requires a rigorous methodology to develop the software involved. The development methodology proposed in this paper adapts agile principles and patterns to support the building of embedded control systems, focusing on the issues relating to a system's constraints and safety. Strong unit testing, to ensure correctness, including the satisfaction of timing constraints, is the foundation of the proposed methodology. A platform-based design approach is used to balance costs and time-to-market in relation to performance and functionality constraints. It is concluded that the proposed methodology significantly reduces design time and costs, as well as leading to better software modularity and reliability
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