11,575 research outputs found
Teaching Parallel Programming Using Java
This paper presents an overview of the "Applied Parallel Computing" course
taught to final year Software Engineering undergraduate students in Spring 2014
at NUST, Pakistan. The main objective of the course was to introduce practical
parallel programming tools and techniques for shared and distributed memory
concurrent systems. A unique aspect of the course was that Java was used as the
principle programming language. The course was divided into three sections. The
first section covered parallel programming techniques for shared memory systems
that include multicore and Symmetric Multi-Processor (SMP) systems. In this
section, Java threads was taught as a viable programming API for such systems.
The second section was dedicated to parallel programming tools meant for
distributed memory systems including clusters and network of computers. We used
MPJ Express-a Java MPI library-for conducting programming assignments and lab
work for this section. The third and the final section covered advanced topics
including the MapReduce programming model using Hadoop and the General Purpose
Computing on Graphics Processing Units (GPGPU).Comment: 8 Pages, 6 figures, MPJ Express, MPI Java, Teaching Parallel
Programmin
Investigating SRAM PUFs in large CPUs and GPUs
Physically unclonable functions (PUFs) provide data that can be used for
cryptographic purposes: on the one hand randomness for the initialization of
random-number generators; on the other hand individual fingerprints for unique
identification of specific hardware components. However, today's off-the-shelf
personal computers advertise randomness and individual fingerprints only in the
form of additional or dedicated hardware.
This paper introduces a new set of tools to investigate whether intrinsic
PUFs can be found in PC components that are not advertised as containing PUFs.
In particular, this paper investigates AMD64 CPU registers as potential PUF
sources in the operating-system kernel, the bootloader, and the system BIOS;
investigates the CPU cache in the early boot stages; and investigates shared
memory on Nvidia GPUs. This investigation found non-random non-fingerprinting
behavior in several components but revealed usable PUFs in Nvidia GPUs.Comment: 25 pages, 6 figures. Code in appendi
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Computer assisted mathematical programming
A Computer Assisted Mathematical Programming (Modelling) System (CAMPS) is described in this paper. The system uses program generator techniques for model creation and contrasts with earlier approaches which use a special purpose language to construct models. Thus no programming skill is required to formulate a model. In designing the system we have first analysed the salient components of the mathematical programming activity. A mathematical programming model is usually constructed by progressive definition of dimensions, data tables, model variables, model constraints and the matrix coefficients which connect the last two entities. Computer assistance is provided to structure the data and the resulting model in the above sequence. In addition to this novel feature and the automatic documentation facility, the system is in line with recent developments, and incorporates a friendly and flexible user interface
Asteroid exploration and utilization: The Hawking explorer
The Earth is nearing depletion of its natural resources at a time when human beings are rapidly expanding the frontiers of space. The resources which may exist on asteroids could have enormous potential for aiding and enhancing human space exploration as well as life on Earth. With the possibly limitless opportunities that exist, it is clear that asteroids are the next step for human existence in space. This report comprises the efforts of NEW WORLDS, Inc. to develop a comprehensive design for an asteroid exploration/sample return mission. This mission is a precursor to proof-of-concept missions that will investigate the validity of mining and materials processing on an asteroid. Project STONER (Systematic Transfer of Near Earth Resources) is based on two utilization scenarios: (1) moving an asteroid to an advantageous location for use by Earth; and (2) mining an asteroids and transporting raw materials back to Earth. The asteroid explorer/sample return mission is designed in the context of both scenarios and is the first phase of a long range plane for humans to utilize asteroid resources. The report concentrates specifically on the selection of the most promising asteroids for exploration and the development of an exploration scenario. Future utilization as well as subsystem requirements of an asteroid sample return probe are also addressed
A Language and Hardware Independent Approach to Quantum-Classical Computing
Heterogeneous high-performance computing (HPC) systems offer novel
architectures which accelerate specific workloads through judicious use of
specialized coprocessors. A promising architectural approach for future
scientific computations is provided by heterogeneous HPC systems integrating
quantum processing units (QPUs). To this end, we present XACC (eXtreme-scale
ACCelerator) --- a programming model and software framework that enables
quantum acceleration within standard or HPC software workflows. XACC follows a
coprocessor machine model that is independent of the underlying quantum
computing hardware, thereby enabling quantum programs to be defined and
executed on a variety of QPUs types through a unified application programming
interface. Moreover, XACC defines a polymorphic low-level intermediate
representation, and an extensible compiler frontend that enables language
independent quantum programming, thus promoting integration and
interoperability across the quantum programming landscape. In this work we
define the software architecture enabling our hardware and language independent
approach, and demonstrate its usefulness across a range of quantum computing
models through illustrative examples involving the compilation and execution of
gate and annealing-based quantum programs
VLSI Revisited - Revival in Japan
This paper describes the abundance of semiconductor consortia that have come into existence in Japan since the mid-1990s. They clearly reflect the ambition of the government - through its reorganized ministry METI and company initiatives - to regain some of the industrial and technological leadership that Japan has lost. The consortia landscape is very different in Japan compared with EU and the US. Outside Japan the universities play a much bigger and very important role. In Europe there has emerged close collaboration, among national government agencies, companies and the EU Commission in supporting the IT sector with considerable attention to semiconductor technologies. Another major difference, and possibly the most important one, is the fact that US and EU consortia include and mix partners from different areas of the semiconductor landscape including wafer makers, material suppliers, equipment producers and integrated device makers.semiconductors, Hitachi, Sony, Toshiba, Elpida, Renesas, Sematech, VLSI, JESSI, MEDEA, ASPLA, MIRAI, innovation system
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