MobiCore: An Adaptive Hybrid Approach for Power-Efficient CPU Management on Android Devices

Smartphones are becoming essential devices used for various types of applications in our daily life. To satisfy the ever-increasing performance requirement, the number of CPU cores in a phone keeps growing, which imposes a great impact on its power consumption. This work presents a series of analysis to understand how the current Android resource management policy adjusts CPU features. Our results indicate a significant improvement margin for CPU power efficiency in modern Android smartphones. We then propose MobiCore – a power-efficient CPU management scheme that can optimize the use of Dynamic and Frequency Voltage Scaling (DVFS) and the Dynamic Core Scaling (DCS) techniques with a sensitive control on CPU bandwidth. The measurements on the real systems prove that MobiCore can achieve substantial CPU power reduction compared to state-of-the-art architecture

CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5 D, and 3D Processor-Memory Systems

Processing cores and the accompanying main memory working in tandem enable the modern processors. Dissipating heat produced from computation, memory access remains a significant problem for processors. Therefore, processor thermal management continues to be an active research topic. Most thermal management research takes place using simulations, given the challenges of measuring temperature in real processors. Since core and memory are fabricated on separate packages in most existing processors, with the memory having lower power densities, thermal management research in processors has primarily focused on the cores. Memory bandwidth limitations associated with 2D processors lead to high-density 2.5D and 3D packaging technology. 2.5D packaging places cores and memory on the same package. 3D packaging technology takes it further by stacking layers of memory on the top of cores themselves. Such packagings significantly increase the power density, making processors prone to heating. Therefore, mitigating thermal issues in high-density processors (packaged with stacked memory) becomes an even more pressing problem. However, given the lack of thermal modeling for memories in existing interval thermal simulation toolchains, they are unsuitable for studying thermal management for high-density processors. To address this issue, we present CoMeT, the first integrated Core and Memory interval Thermal simulation toolchain. CoMeT comprehensively supports thermal simulation of high- and low-density processors corresponding to four different core-memory configurations - off-chip DDR memory, off-chip 3D memory, 2.5D, and 3D. CoMeT supports several novel features that facilitate overlying system research. Compared to an equivalent state-of-the-art core-only toolchain, CoMeT adds only a ~5% simulation-time overhead. The source code of CoMeT has been made open for public use under the MIT license.Comment: https://github.com/marg-tools/CoMe

CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems

Processing cores and the accompanying main memory working in tandem enable modern processors. Dissipating heat produced from computation remains a significant problem for processors. Therefore, the thermal management of processors continues to be an active subject of research. Most thermal management research is performed using simulations, given the challenges in measuring temperatures in real processors. Fast yet accurate interval thermal simulation toolchains remain the research tool of choice to study thermal management in processors at the system level. However, the existing toolchains focus on the thermal management of cores in the processors, since they exhibit much higher power densities than memory. The memory bandwidth limitations associated with 2D processors lead to high-density 2.5D and 3D packaging technology: 2.5D packaging technology places cores and memory on the same package; 3D packaging technology takes it further by stacking layers of memory on the top of cores themselves. These new packagings significantly increase the power density of the processors, making them prone to overheating. Therefore, mitigating thermal issues in high-density processors (packaged with stacked memory) becomes even more pressing. However, given the lack of thermal modeling for memories in existing interval thermal simulation toolchains, they are unsuitable for studying thermal management for high-density processors. To address this issue, we present the first integrated Core and Memory interval Thermal (CoMeT) simulation toolchain. CoMeT comprehensively supports thermal simulation of high- and low-density processors corresponding to four different core-memory (integration) configurations-off-chip DDR memory, off-chip 3D memory, 2.5D, and 3D. CoMeT supports several novel features that facilitate overlying system research. CoMeT adds only an additional similar to 5% simulation-time overhead compared to an equivalent state-of-the-art core-only toolchain. The source code of CoMeT has been made open for public use under the MIT license

Predictive power management for multi-core processors

textEnergy consumption by computing systems is rapidly increasing due to the growth of data centers and pervasive computing. In 2006 data center energy usage in the United States reached 61 billion kilowatt-hours (KWh) at an annual cost of 4.5 billion USD [Pl08]. It is projected to reach 100 billion KWh by 2011 at a cost of 7.4 billion USD. The nature of energy usage in these systems provides an opportunity to reduce consumption. Specifically, the power and performance demand of computing systems vary widely in time and across workloads. This has led to the design of dynamically adaptive or power managed systems. At runtime, these systems can be reconfigured to provide optimal performance and power capacity to match workload demand. This causes the system to frequently be over or under provisioned. Similarly, the power demand of the system is difficult to account for. The aggregate power consumption of a system is composed of many heterogeneous systems, each with a unique power consumption characteristic. This research addresses the problem of when to apply dynamic power management in multi-core processors by accounting for and predicting power and performance demand at the core-level. By tracking performance events at the processor core or thread-level, power consumption can be accounted for at each of the major components of the computing system through empirical, power models. This also provides accounting for individual components within a shared resource such as a power plane or top-level cache. This view of the system exposes the fundamental performance and power phase behavior, thus making prediction possible. This dissertation also presents an extensive analysis of complete system power accounting for systems and workloads ranging from servers to desktops and laptops. The analysis leads to the development of a simple, effective prediction scheme for controlling power adaptations. The proposed Periodic Power Phase Predictor (PPPP) identifies patterns of activity in multi-core systems and predicts transitions between activity levels. This predictor is shown to increase performance and reduce power consumption compared to reactive, commercial power management schemes by achieving higher average frequency in active phases and lower average frequency in idle phases.Electrical and Computer Engineerin

Contributions to the solution of the energy efficient file distribution problem

It has been realized that energy; one of the key requirements for modern human civilization, must be used efficiently for the civilization to be sustainable. The Information and Communications Technology (ICI) sector is no exception. It has been shown through research that ICT is consuming energy comparable to the aviation sector and is still increasing rapidly. In order to address this issue, many energy efficient approaches applicable to ICT sector have been proposed in the literature. In this Thesis, we pick one of the most ubiquitous task in ICT, file distribution and concentrate on finding ways of transferring a file from one server to many hosts in the most energy efficient manner. We study the problem for one server and many host problem but our algorithms can be applied to many general scenarios inducing P2P file distri­bution, replication of content in a doud, synchronization of caches in content distribution networks, downloading software updates to millions of PCs worldwide, and many more applications w here the data disseminated does not have to be consumed instantaneous y; for example, in video streaming. We study the problem for one server and many hosts but our algorithms can be applied to more general scenarios inducing P2P file distribution, replication of content in a doud, synchronization of caches in content distribution networks, downloading soft­ware updates to millions of PCs worldwide, We assume that the time is slotted and that the file is transferred in units of data called blocks. Each host can have arbitrary power consumption, upload and download capacities. To begin with, we prove that the prob­lem of energy efficient file distribution is NP-complete. In order to solve the problem optimally; we assume additional constraints and impose that all the hosts involved in the file transfer should have same upload and download capacity. Moreover; we also assume that the upload and download capacities are such that they are integral multi­ples of each other, which is typically the case. Under these conditions, we prove lower bounds on energy and design algorithms for file distribution that achieve the calculated lower bounds. Our algorithms minimize the amount of time a host has to be on to down­load and/ or upload in the distribution process. Apart from being theoretically sound, we also evaluate our model by extending our analysis through extensive numerical evaluation to compare the proposed algorithms with the already existing schemes of transfers. Our algorithms show promising improvement over not just the traditional energy agnostic approaches but also over the schemes designed for energy efficient file distribution. It has been shown that our algorithms are at least 50% more energy efficient than any of the proposals compared with. We advance our numerical analysis to relax the constraints in the theoretical analysis and conclude that our algorithms are also applicable in scenarios in which the comput­ing and networking hardware is energy efficient. Our algorithms can exploit the power proportionality of the devices. No efficiency comes without a cost. In this case, we pay the cost in terms of the tight synchronization that our algorithms require. However, we argue that such a tight syn­chronization at each slot level is possible in today's Internet particularly if the algorithms are applied to the hosts inside a corporation in which all the hosts and network are controlled by a central entity. For example, servers of a cloud, content distribution network, software updates inside a corporation, etc.Programa Oficial de Doctorado en Ingeniería TelemáticaPresidente: Fidel Cacheda Seijo.- Secretario: María Carmen Guerrero López.- Vocal: Guillermo Agustín Ibáñez Fernánde

Device characteristics-based differentiated energy-efficient adaptive solution for multimedia delivery over heterogeneous wireless networks

Energy efficiency is a key issue of highest importance to mobile wireless device users, as those devices are powered by batteries with limited power capacity. It is of very high interest to provide device differentiated user centric energy efficient multimedia content delivery based on current application type, energy-oriented device features and user preferences. This thesis presents the following research contributions in the area of energy efficient multimedia delivery over heterogeneous wireless networks: 1. ASP: Energy-oriented Application-based System profiling for mobile devices: This profiling provides services to other contributions in this thesis. By monitoring the running applications and the corresponding power demand on the smart mobile device, a device energy model is obtained. The model is used in conjunction with applications’ power signature to provide device energy constraints posed by running applications. 2. AWERA 3. DEAS: A Device characteristics-based differentiated Energy-efficient Adaptive Solution for video delivery over heterogeneous wireless networks. Based on the energy constraint, DEAS performs energy efficient content delivery adaptation for the current application. Unlike the existing solutions, DEAS takes all the applications running on the system into account and better balances QoS and energy efficiency. 4. EDCAM 5. A comprehensive survey on state-of-the-art energy-efficient network protocols and energy-saving network technologies

Unifying hardware and software benchmarking: a resource-agnostic model

Lilja (2005) states that “In the field of computer science and engineering there is surprisingly little agreement on how to measure something as fun- damental as the performance of a computer system.”. The field lacks of the most fundamental element for sharing measures and results: an appropriate metric to express performance. Since the introduction of laptops and mobile devices, there has been a strong research focus towards the energy efficiency of hardware. Many papers, both from academia and industrial research labs, focus on methods and ideas to lower power consumption in order to lengthen the battery life of portable device components. Much less effort has been spent on defining the responsibility of software in the overall computational system energy consumption. Some attempts have been made to describe the energy behaviour of software, but none of them abstract from the physical machine where the measurements were taken. In our opinion this is a strong drawback because results can not be generalized. In this work we attempt to bridge the gap between characterization and prediction, of both hardware and software, of performance and energy, in a single unified model. We propose a model designed to be as simple as possible, generic enough to be abstract from the specific resource being described or predicted (applying to both time, memory and energy), but also concrete and practical, allowing useful and precise performance and energy predictions. The model applies to the broadest set of resource possible. We focus mainly on time and memory (hence bridging hardware benchmarking and classical algorithms time complexity), and energy consumption. To ensure a wide applicability of the model in real world scenario, the model is completely black-box, it does not require any information about the source code of the program, and only relies on external metrics, like completion time, energy consumption, or performance counters. Extending the benchmarking model, we define the notion of experimental computational complexity, as the characterization of how the resource usage changes as the input size grows. Finally, we define a high-level energy model capable of characterizing the power consumption of computers and clusters, in terms of the usage of resources as defined by our benchmarking model. We tested our model in four experiments: Expressiveness: we show the close relationship between energy and clas- sical theoretical complexity, also showing that our experimental com- putational complexity is expressive enough to capture interesting be- haviour of programs simply analysing their resource usage. Performance prediction we use the large database of performance mea- sures available on the CPU SPEC website to train our model and predict the performance of the CPU SPEC suite on randomly selected computers. Energy profiling: we tested our model to characterize and predict the power usage of a cluster running OpenFOAM, changing the number of active nodes and cores. Scheduling: on heterogeneous systems applying our performance pre- diction model to features of programs extracted at runtime, we predict the device where is most convenient to execute the programs, in an heterogeneous system