3 research outputs found

    High-speed EBCOT with dual context-modeling coding architecture for JPEG2000

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    [[abstract]]This work presents a parallel context-modeling coding architecture and a matching arithmetic coder (MQ coder) for the embedded block coding (EBCOT) unit of the JPEG2000 encoder. The tier-1 of the EBCOT consumes most of the computation time in a JPEG2000 encoding system, and the proposed parallel architecture can increase the throughput rate of the context-modeling. To match the high throughput rate of the parallel context-modeling architecture, and efficient pipelined architecture for context-based adaptive arithmetic encoder is proposed. This encoder of JPEG2000 can work at 185MHz to encode one symbol each cycle. Compared with the conventional context-modeling architecture, our parallel architecture can decrease the execution time about 25%.[[conferencetype]]國際[[conferencedate]]20040523~20040526[[conferencelocation]]溫哥華, 加拿

    [[alternative]]The Research and Implementation of the Wireless Optical Communications Transceiver(II)

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    計畫編號:NSC94-2745-E032-002-URD研究期間:200508~200607研究經費:739,000[[sponsorship]]行政院國家科學委員

    Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000

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