7 research outputs found

    A modified multiphase oscillator with improved phase noise performance

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    This paper investigates the factors that influence the phase noise performance of an oscillator and proposes a modified structure for improved phase noise performance. A single and multiphase oscillator analysis using the harmonic balance method is presented. The modified structure increases the oscillation amplitude without increasing the bias current and leads to improved phase noise performance as well as decreased power consumption. The modification is analyzed and the figure of merit of the oscillator shows a significant improvement of 21 dB. Numerical and analytical solutions are presented to predict the oscillation frequency and phase noise. The analytical solution is used to approximate the first harmonic and can be combined with numerical simulations to extrapolate phase noise performance.The measurements relating to this work were enabled through the support of SAAB Electronic Defence Systems (EDS). Funding was also received from the National Research Foundation (NRF), Department of Science and Technology, South Africa. NRF funding was for measurement equipment – a millimeter-wave vector network analyzer (under grant ID: 72321) and wafer-prober (under grant ID: 78580). NRF funding (under grant ID: 72321) also allowed collaboration with Prof Luca Larcher, Università degli studi di Modena e Reggio Emilia, Italy.http://www.elsevier.com/locate/mejo2018-04-30am2017Electrical, Electronic and Computer Engineerin

    A CMOS Fractional Frequency Synthesizer for a Fully Integrated S-Band Extravehicular Activity (EVA) Radio Transceiver

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    Extravehicular activity (EVA) is an important aspect of space explorations. It enables astronauts carry out tasks outside the protective environment of the spacecraft cabin. The crew requires EVA radio transceivers to transmit and receive information among themselves and with equipment in space. Communication is done through the S frequency band (2GHz to 4GHz). Since the EVA radio transceiver is part of the space suits the astronauts wear for EVA, it is important that lightweight, low power consumption and miniaturized systems are utilized in their design and implementation. This thesis presents the design and implementation of a fully integrated frequency synthesizer for carrier signal generation in the EVA radio transceiver. The transceiver consists of a dual up-conversion transmitter (TX) and a direct conversion receiver (RX) at 2.4GHz. It supports 10 channels spaced at 6MHz for both video and voice communications, covering the frequency band from 2.4GHz to 2.454GHz. Therefore in the TX mode, the frequencies required are 0.8GHz to 0.818GHz (quadrature) and 1.6GHz to 1.636GHz (differential) for dual up-conversion to prevent the pulling problem between the power amplifier (PA) and voltage controlled oscillator (VCO) of the synthesizer. In RX mode, the frequencies from 4.8GHz to 4.908GHz are synthesized with a divide-by-two circuit to generate quadrature signals of 2.4GHz to 2.454GHz. In order to cover the frequency ranges in both TX and RX modes with a small area and low power consumption, a dual-band VCO fractional-N PLL is implemented. The dual-path loop filter topology is utilized to further reduce chip area. The fractional synthesizer is fabricated in 0.18μm CMOS technology and has a loop bandwidth of around 40kHz. It occupies a relatively small area of 1.54mm^(2) and consumes a low power of 22.68mW with a 1 V supply for the VCO and 1.8V supply for the rest of the blocks. The synthesizer achieves a reference spur performance of less than –62.34dBc for the lower band (LB) and less than –68.36dBc for the higher band (HB). The phase noise at 1MHz for the LB ranges from -125.38 to -130.39 dBc/Hz and for the HB -113.12 to -120.16 dBc/Hz. Thus the synthesizer achieves low power consumption with good spectral purity while occupying a small chip area making it suitable for EVA radio applications

    Design of reconfigurable multi-mode RF circuits

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    Wireless communication systems and devices have been developing at a much faster pace in the past few years. With the introduction of new applications and services and the increasing demand for higher data rate comes the need for new frequency bands and new standards. One critical issue for next generation wireless devices is how to support all of the existing and emerging bands while not increasing the cost and power consumption. A feasible solution is the concept of the software-defined radio where a single receiver can be reconfigured to operate in different modes, each of which supports one or several bands and/or standards. To implement such a reconfigurable receiver, reconfigurable RF building blocks, such as the LNA, mixer, VCO, etc., are required. This dissertation focuses on two key blocks: the low noise amplifier (LNA) and the voltage controlled oscillator (VCO). First the design, modeling and characterization of a multi-tap transformer are discussed. Simple mathematical calculations are utilized to estimate the inductances and coupling coefficients from the physical parameters of a multi-tap transformer. The design method is verified with several designed multi-tap transformers that are characterized up to 10 GHz using Momentum simulation results. The effect of switch loss on a switched multi-tap transformer is explored and a broadband lumped-element model of the multi-tap transformer is also proposed. Next a reconfigurable multimode LNA capable of single-band, concurrent dual-band, and ultra-wideband operation is presented. The multimode operation is realized by incorporating a switched multi-tap transformer into the input matching network of an inductively degenerated common source amplifier. The proposed LNA achieves single band matching at 2.8, 3.3, and 4.6 GHz; concurrent dual-band matching at 2.05 and 5.65 GHz; and ultra-wideband matching from 4.3 to 10.8 GHz. The chip was fabricated in a 0.13 m CMOS process, and occupies an area of 0.72 mm2, and has a power dissipation of 6.4 mW from a 1.2-V supply. Finally, a triple-mode VCO using a transformer-based 4th order tank with tunable transconductance cells coupling the primary and secondary inductor is introduced. The tank impedance can be re-shaped by the transconductance cells through the tuning of their biasing currents. With the control of biasing current, VCO is configured in three modes, capable of generating a single frequency in 3- and 5- GHz bands, respectively, and two frequencies in both 3- and 5- GHz bands simultaneously. The triple-mode VCO was fabricated in a 0.13 μm CMOS process, occupies an area of 0.16 mm2, and dissipates 5.6 mW from a 1.2-V supply

    Analysis and Design of Transformer-Based Dual-Band VCO for Software-Defined Radios

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    This work presents complete analysis of both one-port and two-port dual-band oscillators using transformer-based fourth-order LC tanks, from which critical parameters including oscillation frequency, start-up condition, tank Q, phase noise-are thoroughly derived and compared. It is shown that one-port oscillators consume less power than two-port counterparts but may suffer from stability problem which can be solved by a notch-peak cancellation technique. On the other hand, compared to one-port oscillators, two-port oscillators need to consume more power to obtain the same output swing, but their phase noise can be improved more linearly with increasing bias current, and thus they can achieve lower phase noise with a sufficiently large bias current. Based on the results, a dual-band quadrature voltage-controlled oscillator (Q-VCO) is systematically designed and implemented in a 0.13-mu m CMOS process for software-defined -radio (SDR) applications, in which the two-port topology is used in the low band for low phase noise and the one-port topology is employed in the high band for low power consumption. The prototype achieves a dual-band operation with in-phase and quadrature-phase (IQ) output signals from 2.7 GHz to 4.3 GHz and from 8.4 GHz to 12.4 GHz. At 3.6 GHz and 10.4 GHz, phase noise at 3 MHz offset of -135.9 dBc/Hz and -119 dBc/Hz and sideband-rejection ratios (SBR) of 37 dB and 41 dB are measured, respectively

    Novel RF CMOS Integrated Circuits and Systems for Broadband Dielectric Spectroscopy

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    Broadband dielectric spectroscopy has proven to be a valuable technique for characterization of chemicals and biomaterials. It has the great potential to become an indispensable and cost-effective tool in point-of-care medical applications due to its label-free and non-invasive operation. However, most of the existing dielectric spectroscopy instruments require bulky, heavy and expensive measurement set-up, restricting their use to only special applications in industry and laboratories. Therefore, integrated dielectric spectroscopy on silicon capable of direct detection of chemicals/biomaterials' complex permittivity can yield significant cost and size reduction, system integration, portability, enormous processing, and high throughput. A CMOS wideband dielectric spectroscopy system is proposed for chemical and biological material characterization. The complex permittivity detection is performed using a configurable harmonic-rejecting receiver capable of indirectly measuring the complex admittance of sensing capacitor exposed to the material-under-test (MUT) and subject to RF signal excitation with a frequency range of 0.62-10 GHz. The sensing capacitor is embedded in a voltage divider topology with a fixed capacitor and the relative variations in the magnitude and phase of the voltages across the capacitors are used to find the real and imaginary parts of the permittivity. The sensor achieves an rms permittivity error of less than 1% over the entire operation bandwidth. Using a sub-harmonic mixing scheme, the system can perform complex permittivity measurements from 0.62 to 10 GHz while requiring an input signal source with frequency range of only from 5 to 10 GHz. Thereby, the permittivity measurement system can be easily made self-sustained by implementing a 5-10 GHz frequency synthesizer on the same chip. One of the key building blocks in such a frequency synthesizer is the voltage-controlled oscillator (VCO) which has to cover an octave of frequency range. A novel low-phase-noise wide-tuning range VCO is presented using a triple-band LC resonator. The implemented VCO in 0.18μm CMOS technology achieves a continuous tuning range of 86.7% from 5.12 GHz to 12.95 GHz while drawing 5 to 10 mA current from 1-V supply. The measured phase noise at 1 MHz offset from carrier frequencies of 5.9, 9.12 and 12.25 GHz is -122.9, -117.1 and -110.5 dBc/Hz, respectively. Also, a dual-band quadrature voltage-controlled oscillator (QVCO) is presented using a transformer-based high-order LC-ring resonator which inherently provides quadrature signals without requiring noisy coupling transistors as in traditional approaches. The proposed resonator shows two possible oscillation frequencies which are exploited to realize a wide-tuning range QVCO employing a mode-switching transistor network. Due to the use of transformers, the oscillator has minimal area penalty compared to the conventional designs. The implemented prototype in a 65-nm CMOS process achieves a continuous tuning range of 77.8% from 2.75 GHz to 6.25 GHz while consuming 9.7 to 15.6 mA current from 0.6-V supply. The measured phase noise figure-of-merit (FoM) at 1 MHz offset ranges from 184 dB to 188.2 dB throughout the entire tuning range. The QVCO also exhibits good quadrature accuracy with 1.5º maximum phase error and occupies a relatively small silicon area of 0.35 mm^2

    RF CMOS Oscillators for Modern Wireless Applications

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    While mobile phones enjoy the largest production volume ever of any consumer electronics products, the demands they place on radio-frequency (RF) transceivers are particularly aggressive, especially on integration with digital processors, low area, low power consumption, while being robust against process-voltage-temperature variations. Since mobile terminals inherently operate on batteries, their power budget is severely constrained. To keep up with the ever increasing data-rate, an ever-decreasing power per bit is required to maintain the battery lifetime. The RF oscillator is the second most power-hungry block of a wireless radio (after power amplifiers). Consequently, any power reduction in an RF oscillator will greatly benefit the overall power efficiency of the cellular transceiver. Moreover, the RF oscillators' purity limits the transceiver performance. The oscillator's phase noise results in power leakage into adjacent channels in a transmit mode and reciprocal mixing in a receive mode. On the other hand, the multi-standard and multi-band transceivers that are now trending demand wide tuning range oscillators. However, broadening the oscillator’s tuning range is usually at the expense of die area (cost) or phase noise. The main goal of this book is to bring forth the exciting and innovative RF oscillator structures that demonstrate better phase noise performance, lower cost, and higher power efficiency than currently achievable. Technical topics discussed in RF CMOS Oscillators for Modern Wireless Applications include: Design and analysis of low phase-noise class-F oscillators Analyze a technique to reduce 1/f noise up-conversion in the oscillators Design and analysis of low power/low voltage oscillators Wide tuning range oscillators Reliability study of RF oscillators in nanoscale CMO

    RF CMOS Oscillators for Modern Wireless Applications

    Get PDF
    While mobile phones enjoy the largest production volume ever of any consumer electronics products, the demands they place on radio-frequency (RF) transceivers are particularly aggressive, especially on integration with digital processors, low area, low power consumption, while being robust against process-voltage-temperature variations. Since mobile terminals inherently operate on batteries, their power budget is severely constrained. To keep up with the ever increasing data-rate, an ever-decreasing power per bit is required to maintain the battery lifetime. The RF oscillator is the second most power-hungry block of a wireless radio (after power amplifiers). Consequently, any power reduction in an RF oscillator will greatly benefit the overall power efficiency of the cellular transceiver. Moreover, the RF oscillators' purity limits the transceiver performance. The oscillator's phase noise results in power leakage into adjacent channels in a transmit mode and reciprocal mixing in a receive mode. On the other hand, the multi-standard and multi-band transceivers that are now trending demand wide tuning range oscillators. However, broadening the oscillator’s tuning range is usually at the expense of die area (cost) or phase noise. The main goal of this book is to bring forth the exciting and innovative RF oscillator structures that demonstrate better phase noise performance, lower cost, and higher power efficiency than currently achievable. Technical topics discussed in RF CMOS Oscillators for Modern Wireless Applications include: Design and analysis of low phase-noise class-F oscillators Analyze a technique to reduce 1/f noise up-conversion in the oscillators Design and analysis of low power/low voltage oscillators Wide tuning range oscillators Reliability study of RF oscillators in nanoscale CMO
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