Synthesis of nonseparable 3-D spatiotemporal bandpass filters on analog networks

Published versio

On analog networks and mixed-domain spatio-temporal frequency response

Published versio

Local Causal States and Discrete Coherent Structures

Coherent structures form spontaneously in nonlinear spatiotemporal systems and are found at all spatial scales in natural phenomena from laboratory hydrodynamic flows and chemical reactions to ocean, atmosphere, and planetary climate dynamics. Phenomenologically, they appear as key components that organize the macroscopic behaviors in such systems. Despite a century of effort, they have eluded rigorous analysis and empirical prediction, with progress being made only recently. As a step in this, we present a formal theory of coherent structures in fully-discrete dynamical field theories. It builds on the notion of structure introduced by computational mechanics, generalizing it to a local spatiotemporal setting. The analysis' main tool employs the \localstates, which are used to uncover a system's hidden spatiotemporal symmetries and which identify coherent structures as spatially-localized deviations from those symmetries. The approach is behavior-driven in the sense that it does not rely on directly analyzing spatiotemporal equations of motion, rather it considers only the spatiotemporal fields a system generates. As such, it offers an unsupervised approach to discover and describe coherent structures. We illustrate the approach by analyzing coherent structures generated by elementary cellular automata, comparing the results with an earlier, dynamic-invariant-set approach that decomposes fields into domains, particles, and particle interactions.Comment: 27 pages, 10 figures; http://csc.ucdavis.edu/~cmg/compmech/pubs/dcs.ht

A silicon implementation of the fly's optomotor control system

Flies are capable of stabilizing their body during free flight by using visual motion information to estimate self-rotation. We have built a hardware model of this optomotor control system in a standard CMOS VLSI process. The result is a small, low-power chip that receives input directly from the real world through on-board photoreceptors and generates motor commands in real time. The chip was tested under closed-loop conditions typically used for insect studies. The silicon system exhibited stable control sufficiently analogous to the biological system to allow for quantitative comparisons

Filtering Suppresses Amplitude Chimeras

Amplitude chimera (AC) is an interesting chimera pattern that has been discovered recently and is distinct from other chimera patterns, like phase chimeras and amplitude mediated phase chimeras. Unlike other chimeras, in the AC pattern all the oscillators have the same phase velocity, however, the oscillators in the incoherent domain show periodic oscillations with randomly shifted origin. In this paper we investigate the effect of local filtering in the coupling path on the occurrence of AC patterns. Our study is motivated by the fact that in the practical coupling channels filtering effects come into play due to the presence of dispersion and dissipation. We show that a low-pass or all-pass filtering is actually detrimental to the occurrence of AC. We quantitatively establish that with decreasing cut-off frequency of the filter, an AC transforms into a synchronized pattern. We also show that the symmetry-breaking steady state, i.e., the oscillation death state can be revoked and rhythmogenesis can be induced by local filtering. Our study will shed light on the understanding of many biological systems where spontaneous symmetry-breaking and local filtering occur simultaneously.DFG, 163436311, SFB 910: Kontrolle selbstorganisierender nichtlinearer Systeme: Theoretische Methoden und Anwendungskonzept

Memory and information processing in neuromorphic systems

A striking difference between brain-inspired neuromorphic processors and current von Neumann processors architectures is the way in which memory and processing is organized. As Information and Communication Technologies continue to address the need for increased computational power through the increase of cores within a digital processor, neuromorphic engineers and scientists can complement this need by building processor architectures where memory is distributed with the processing. In this paper we present a survey of brain-inspired processor architectures that support models of cortical networks and deep neural networks. These architectures range from serial clocked implementations of multi-neuron systems to massively parallel asynchronous ones and from purely digital systems to mixed analog/digital systems which implement more biological-like models of neurons and synapses together with a suite of adaptation and learning mechanisms analogous to the ones found in biological nervous systems. We describe the advantages of the different approaches being pursued and present the challenges that need to be addressed for building artificial neural processing systems that can display the richness of behaviors seen in biological systems.Comment: Submitted to Proceedings of IEEE, review of recently proposed neuromorphic computing platforms and system

Level based sampling techniques for energy conservation in large scale wireless sensor networks

As the size and node density of wireless sensor networks (WSN) increase,the energy conservation problem becomes more critical and the conventional methods become inadequate. This dissertation addresses two different problems in large scale WSNs where all sensors are involved in monitoring,but the traditional practice of periodic transmissions of observations from all sensors would drain excessive amount of energy. In the first problem,monitoring of the spatial distribution of a two dimensional correlated signal is considered using a large scale WSN. It is assumed that sensor observations are heavily affected by noise. We present an approach that is based on detecting contour lines of the signal distribution to estimate the spatial distribution of the signal without involving all sensors in the network. Energy efficient algorithms are proposed for detecting and tracking the temporal variation of the contours. Optimal contour levels that minimize the estimation error and a practical approach for selection of contour levels are explored. Performance of the proposed algorithm is explored with different types of contour levels and detection parameters. In the second problem,a WSN is considered that performs health monitoring of equipment from a power substation. The monitoring applications require transmissions of sensor observations from all sensor nodes on a regular basis to the base station,which is very costly in terms of communication cost. To address this problem,an efficient sampling technique using level-crossings (LCS) is proposed. This technique saves communication cost by suppressing transmissions of data samples that do not convey much information. The performance and cost of LCS for several different level-selection schemes are investigated. The number of required levels and the maximum sampling period for practical implementation of LCS are studied. Finally,in an experimental implementation of LCS with MICAzmote,the performance and cost of LCS for temperature sensing with uniform,logarithmic and a combined version of uniform and logarithmically spaced levels are compared with that using periodic sampling

Point-to-point connectivity between neuromorphic chips using address events

This paper discusses connectivity between neuromorphic chips, which use the timing of fixed-height fixed-width pulses to encode information. Address-events (log2 (N)-bit packets that uniquely identify one of N neurons) are used to transmit these pulses in real time on a random-access time-multiplexed communication channel. Activity is assumed to consist of neuronal ensembles--spikes clustered in space and in time. This paper quantifies tradeoffs faced in allocating bandwidth, granting access, and queuing, as well as throughput requirements, and concludes that an arbitered channel design is the best choice.The arbitered channel is implemented with a formal design methodology for asynchronous digital VLSI CMOS systems, after introducing the reader to this top-down synthesis technique. Following the evolution of three generations of designs, it is shown how the overhead of arbitrating, and encoding and decoding, can be reduced in area (from N to √N) by organizing neurons into rows and columns, and reduced in time (from log2 (N) to 2) by exploiting locality in the arbiter tree and in the row–column architecture, and clustered activity. Throughput is boosted by pipelining and by reading spikes in parallel. Simple techniques that reduce crosstalk in these mixed analog–digital systems are described