2,336 research outputs found
Analog VLSI-Based Modeling of the Primate Oculomotor System
One way to understand a neurobiological system is by building a simulacrum that replicates its behavior in real time using similar constraints. Analog very large-scale integrated (VLSI) electronic circuit technology provides such an enabling technology. We here describe a neuromorphic system that is part of a long-term effort to understand the primate oculomotor system. It requires both fast sensory processing and fast motor control to interact with the world. A one-dimensional hardware model of the primate eye has been built that simulates the physical dynamics of the biological system. It is driven by two different analog VLSI chips, one mimicking cortical visual processing for target selection and tracking and another modeling brain stem circuits that drive the eye muscles. Our oculomotor plant demonstrates both smooth pursuit movements, driven by a retinal velocity error signal, and saccadic eye movements, controlled by retinal position error, and can reproduce several behavioral, stimulation, lesion, and adaptation experiments performed on primates
Spike-based VITE control with Dynamic Vision Sensor applied to an Arm Robot.
Spike-based motor control is very important in the
field of robotics and also for the neuromorphic engineering
community to bridge the gap between sensing / processing
devices and motor control without losing the spike philosophy
that enhances speed response and reduces power consumption.
This paper shows an accurate neuro-inspired spike-based system
composed of a DVS retina, a visual processing system that detects
and tracks objects, and a SVITE motor control, where everything
follows the spike-based philosophy. The control system is a spike
version of the neuroinspired open loop VITE control algorithm
implemented in a couple of FPGA boards: the first one runs the
algorithm and the second one drives the motors with spikes. The
robotic platform is a low cost arm with four degrees of freedom.Ministerio de Ciencia e InnovaciĂłn TEC2009-10639-C04-02/01Ministerio de EconomĂa y Competitividad TEC2012-37868-C04-02/0
Low-Power Tracking Image Sensor Based on Biological Models of Attention
This paper presents implementation of a low-power tracking CMOS image sensor based on biological
models of attention. The presented imager allows tracking of up to N salient targets in the field of view. Employing
"smart" image sensor architecture, where all image processing is implemented on the sensor focal plane, the
proposed imager allows reduction of the amount of data transmitted from the sensor array to external processing
units and thus provides real time operation. The imager operation and architecture are based on the models
taken from biological systems, where data sensed by many millions of receptors should be transmitted and
processed in real time. The imager architecture is optimized to achieve low-power dissipation both in acquisition
and tracking modes of operation. The tracking concept is presented, the system architecture is shown and the
circuits description is discussed
A micropower centroiding vision processor
Published versio
CMOS-3D smart imager architectures for feature detection
This paper reports a multi-layered smart image sensor architecture for feature extraction based on detection of interest points. The architecture is conceived for 3-D integrated circuit technologies consisting of two layers (tiers) plus memory. The top tier includes sensing and processing circuitry aimed to perform Gaussian filtering and generate Gaussian pyramids in fully concurrent way. The circuitry in this tier operates in mixed-signal domain. It embeds in-pixel correlated double sampling, a switched-capacitor network for Gaussian pyramid generation, analog memories and a comparator for in-pixel analog-to-digital conversion. This tier can be further split into two for improved resolution; one containing the sensors and another containing a capacitor per sensor plus the mixed-signal processing circuitry. Regarding the bottom tier, it embeds digital circuitry entitled for the calculation of Harris, Hessian, and difference-of-Gaussian detectors. The overall system can hence be configured by the user to detect interest points by using the algorithm out of these three better suited to practical applications. The paper describes the different kind of algorithms featured and the circuitry employed at top and bottom tiers. The Gaussian pyramid is implemented with a switched-capacitor network in less than 50 ÎŒs, outperforming more conventional solutions.Xunta de Galicia 10PXIB206037PRMinisterio de Ciencia e InnovaciĂłn TEC2009-12686, IPT-2011-1625-430000Office of Naval Research N00014111031
Selective Attention in Multi-Chip Address-Event Systems
Selective attention is the strategy used by biological systems to cope with the inherent limits in their available computational resources, in order to efficiently process sensory information. The same strategy can be used in artificial systems that have to process vast amounts of sensory data with limited resources. In this paper we present a neuromorphic VLSI device, the âSelective Attention Chipâ (SAC), which can be used to implement these models in multi-chip address-event systems. We also describe a real-time sensory-motor system, which integrates the SAC with a dynamic vision sensor and a robotic actuator. We present experimental results from each component in the system, and demonstrate how the complete system implements a real-time stimulus-driven selective attention model
A Foveated Silicon Retina for Two-Dimensional Tracking
A silicon retina chip with a central foveal region for smooth-pursuit tracking and a peripheral region for saccadic target acquisition is presented. The foveal region contains a 9 x 9 dense array of large dynamic range photoreceptors and edge detectors. Two-dimensional direction of foveal motion is computed outside the imaging array. The peripheral region contains a sparse array of 19 x 17 similar, but larger, photoreceptors with in-pixel edge and temporal ON-set detection. The coordinates of moving or flashing targets are computed with two one-dimensional centroid localization circuits located on the outskirts of the peripheral region. The chip is operational for ambient intensities ranging over six orders of magnitude, targets contrast as low as 10%, foveal speed ranging from 1.5 to 10K pixels/s, and peripheral ON-set frequencies from \u3c0.1 to 800 kHz. The chip is implemented in 2-ÎŒm N well CMOS process and consumes 15 mW (V dd = 4 V) in normal indoor light (25 ÎŒW/cm2). It has been used as a person tracker in a smart surveillance system and a road follower in an autonomous navigation system
- âŠ