Resonance mode power supplies with power factor correction

There is an increasing need for AC-DC converters to draw a pure sinusoidal current at near unity power factor from the AC mains. Most conventional power factor correcting systems employ PWM techniques to overcome the poor power factor being presented to the mains. However, the need for smaller and lighter power processing equipment has motivated the use of higher internal conversion frequencies in the past. In this context, resonant converters are becoming a viable alternative to the conventional PWM controlled power supplies. The thesis presents the implementation of active power factor correction in power supplies, using resonance mode techniques. It reviews the PWM power factor correction circuit topologies previously used. The possibility of converting these PWM topologies to resonant mode versions is discussed with a critical assessment as to the suitability of the semiconductor switching devices available today for deployment in these resonant mode supplies. The thesis also provides an overview of the methods used to model active semiconductor devices. The computer modelling is done using the PSpice microcomputer simulation program. The modifications that are needed to the built in MOSFET model in PSpice, when modeling high frequency circuits is discussed. A new two transistor model which replicates the action of a OTO thyristor is also presented. The new model enables the designer to estimate the device parameters with ease by adopting a short calculation and graphical design procedure, based on the manufacturer's data sheets. The need for a converter with a high efficiency, larger power/weight ratio, high input power factor with reduced line current distortion and reduced cost has led to the development of a new resonant mode converter topology, for power processing. The converter presents a near resistive load to the mains thus ensuring a high input power factor, while providing a stabilised de voltage at the output with a small lOOHz ripple. The supply is therefore ideal for preregulation applications. A description of the modes of operation and the analysis of the power circuit are included in the thesis. The possibility of using the converter for low output voltage applications is also discussed. The design of a 300W, 80kHz prototype model of this circuit is presented in the thesis. The design of the isolation transformer and other magnetic components are described in detail. The selection of circuit components and the design and implementation of the variable frequency control loop are also discussed. An evaluation of the experimental and computer simulated results obtained from the prototype model are included in the presentation. The thesis further presents a zero-current switching quasi-resonant flyback circuit topology with power factor correction. The reasons for using this topology for off-line power conversion applications are discussed. The use of a cascoded combination of a bipolar power transistor and two power MOSFETs i~ the configuration has enabled the circuit to process moderate levels of power while simultaneously switching at high frequencies. This fulfils the fundamental precondition for miniaturisation. It also provides a well regulated DC output voltage with a very small ripple while maintaining a high input power factor. The circuit is therefore ideal for use in mobile applications. A preliminary design of the above circuit, its analysis using PSpice, the design of the control circuit, current limiting and overcurrent protection circuitry and the implementation of closed-loop control are all included in the thesis. The experimental results obtained from a bread board model is also presented with an evaluation of the circuit performance. The power factor correction circuit is finally installed in this supply and the overall converter performance is assessed

High power wide bandgap cascode switching circuits

Emerging wide bandgap (WBG) power transistors are capable of improving the efficiency of mains voltage power electronic circuits. Several commercial WBG transistors are now available, but all exhibit undesirable gate drive characteristics. The cascode circuit has been suggested as a solution to this problem: WBG cascodes improve the switching speed, gate characteristics and noise immunity of devices, at the expense of greater on-state resistance. WBG cascodes have not, however, been widely accepted in commercial applications. Previous research has typically been too application-specific, with little practical information available for design engineers wishing to use them. This thesis addresses these shortcomings through a comprehensive investigation of practical design considerations for switch-mode cascode circuits. A SPICE simulation and simplified mathematical model are developed as design tools to give a detailed insight into cascode hard-switching behaviour and to aid cascode optimisation and device selection. The effects of the cascode configuration on static (DC) device performance are quantified for a silicon super-junction (SJ) metal-oxide-semiconductor field-effect transistor (MOSFET), silicon carbide (SiC) junction field-effect transistor JFET and SiC MOSFET. The on-state resistance penalty of the cascode configuration is shown to be modest and potentially mitigated by careful selection of HV transistor gate bias. There are few advantages to using silicon SJ MOSFETs in a cascode configuration, but both SiC MOSFET and JFET cascodes benefit from improved gate drive, reverse conduction and switching characteristics. SiC MOSFETs are shown to be better suited to efficient high temperature operation, while SiC JFETs are more appropriate for high current applications. Cascode switching losses are shown to be reduced compared to standalone devices, although reverse recovery losses can counteract this. Methods of controlling switching transients using gate resistors or feedback capacitors are investigated and shown to be effective. The effects of stray inductance on cascode switching are quantified experimentally for the first time. This corroborates other work and informs the layout of cascode circuits. The resilience of cascodes to severe $\frac{dV}{dt}$ is also demonstrated. The findings of this thesis are summarised in a practical design guide aimed at design engineers who wish to use this useful circuit

Electronic system modelling of UT pulser-receiver and the electron beam welding power source

This thesis was submitted for the degree of Doctor of Engineering and awarded by Brunel University.Continuous improvements to industrial equipment used in essential industrial applications are a key for the commercial success to the equipment manufacturers. Industrial applications always demand optimum performance and reliability and almost all equipment used in industrial applications is complex and are very expensive to replace. Often modifications to hardware and retrofitting additional hardware are encouraged by most equipment manufacturers and operators. The complexity of these systems however, makes assessment of modifications and design change difficult. This research implemented system modelling techniques to overcome this issue, by developing virtual test platforms of two distinctive industrial systems for enhancement assessment. The two distinctive systems were the electronic equipment called pulser-receiver used in ultrasonic non-destructive testing of safety critical oil & gas pipelines and a high voltage power supply used in high energy electron beam welding. Optimisation with emphasis on portability of the pulser-receiver and rapid weld recovery after a flashover fault condition in the electron beam welding application required assessment before design changes were made to hardware. SPICE based simulators LTSpice and PSpice were used to model and simulate the pulser-receiver and the welding power supply respectively. All the models were evaluated appropriately against theoretical data and published datasheets. However, validation of low level component models developed in the research against measurement data at a component level suffered due to system complexity and resource constraints. Close mapping of simulation results to measurement data at a system level were obtained. The research helped build up a wealth of knowledge in the development of circuit simulation models that can be analysed in the time domain with no non-convergent issues. Simulation settings were relaxed without compromising accuracy of model performance.The Engineering and Physical Sciences Research Board (EPSRC) and TWI Ltd

Proceedings of the Second Caltech Conference on Very Large Scale Integration, held at the California Institute of Technology 19-21 January, 1981 ; Organized by the Caltech Computer Science Department and the Caltech Industrial Associates Office, and sponsored by Caltech Industrial Associates and the National Science Foundation

[none