Ultra-low Power Circuits for Internet of Things (IOT)

Miniaturized sensor nodes offer an unprecedented opportunity for the semiconductor industry which led to a rapid development of the application space: the Internet of Things (IoT). IoT is a global infrastructure that interconnects physical and virtual things which have the potential to dramatically improve people's daily lives. One of key aspect that makes IoT special is that the internet is expanding into places that has been ever reachable as device form factor continue to decreases. Extremely small sensors can be placed on plants, animals, humans, and geologic features, and connected to the Internet. Several challenges, however, exist that could possibly slow the development of IoT. In this thesis, several circuit techniques as well as system level optimizations to meet the challenging power/energy requirement for the IoT design space are described. First, a fully-integrated temperature sensor for battery-operated, ultra-low power microsystems is presented. Sensor operation is based on temperature independent/dependent current sources that are used with oscillators and counters to generate a digital temperature code. Second, an ultra-low power oscillator designed for wake-up timers in compact wireless sensors is presented. The proposed topology separates the continuous comparator from the oscillation path and activates it only for short period when it is required. As a result, both low power tracking and generation of precise wake-up signal is made possible. Third, an 8-bit sub-ranging SAR ADC for biomedical applications is discussed that takes an advantage of signal characteristics. ADC uses a moving window and stores the previous MSBs voltage value on a series capacitor to achieve energy saving compared to a conventional approach while maintaining its accuracy. Finally, an ultra-low power acoustic sensing and object recognition microsystem that uses frequency domain feature extraction and classification is presented. By introducing ultra-low 8-bit SAR-ADC with 50fF input capacitance, power consumption of the frontend amplifier has been reduced to single digit nW-level. Also, serialized discrete Fourier transform (DFT) feature extraction is proposed in a digital back-end, replacing a high-power/area-consuming conventional FFT.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137157/1/seojeong_1.pd

Design and Implementation of an Integrated Biosensor Platform for Lab-on-a-Chip Diabetic Care Systems

Recent advances in semiconductor processing and microfabrication techniques allow the implementation of complex microstructures in a single platform or lab on chip. These devices require fewer samples, allow lightweight implementation, and offer high sensitivities. However, the use of these microstructures place stringent performance constraints on sensor readout architecture. In glucose sensing for diabetic patients, portable handheld devices are common, and have demonstrated significant performance improvement over the last decade. Fluctuations in glucose levels with patient physiological conditions are highly unpredictable and glucose monitors often require complex control algorithms along with dynamic physiological data. Recent research has focused on long term implantation of the sensor system. Glucose sensors combined with sensor readout, insulin bolus control algorithm, and insulin infusion devices can function as an artificial pancreas. However, challenges remain in integrated glucose sensing which include degradation of electrode sensitivity at the microscale, integration of the electrodes with low power low noise readout electronics, and correlation of fluctuations in glucose levels with other physiological data. This work develops 1) a low power and compact glucose monitoring system and 2) a low power single chip solution for real time physiological feedback in an artificial pancreas system. First, glucose sensor sensitivity and robustness is improved using robust vertically aligned carbon nanofiber (VACNF) microelectrodes. Electrode architectures have been optimized, modeled and verified with physiologically relevant glucose levels. Second, novel potentiostat topologies based on a difference-differential common gate input pair transimpedance amplifier and low-power voltage controlled oscillators have been proposed, mathematically modeled and implemented in a 0.18μm [micrometer] complementary metal oxide semiconductor (CMOS) process. Potentiostat circuits are widely used as the readout electronics in enzymatic electrochemical sensors. The integrated potentiostat with VACNF microelectrodes achieves competitive performance at low power and requires reduced chip space. Third, a low power instrumentation solution consisting of a programmable charge amplifier, an analog feature extractor and a control algorithm has been proposed and implemented to enable continuous physiological data extraction of bowel sounds using a single chip. Abdominal sounds can aid correlation of meal events to glucose levels. The developed integrated sensing systems represent a significant advancement in artificial pancreas systems

Remote Powering and Communication of Implantable Biosensors Through Inductive Link

Nowadays there is an increasing interest in the field of implantable biosensors. The possibility of real-time monitoring of the human body from inside paves the way to a large number of applications and offers wide opportunities for the future. Within this scenario, the i-IronIC project aims to develop an implantable, low cost, health-care device for real-time monitoring of human metabolites. The contribution of this research work to the i-IronIC project consists of the design and realization of a complete platform to provide power, data communication and remote control to the implantable biosensor. High wearability of the transmitting unit, low invasivity of the implanted electronics, integration of the power management module within the sensor, and a reliable communication protocol with portable devices are the key points of this platform. The power is transmitted to the implanted sensor by exploiting an inductive link. Simulations have been performed to check the effects of several variables on the link performance. These simulations have finally confirmed the possibility to operate in the low megahertz range, where tissue absorption is minimum, even if a miniaturized receiving inductor is used. A wearable patch has been designed to transmit power through the body tissues by driving an external inductor. The same inductive link is used to achieve bidirectional data communication with the implanted device. The patch, named IronIC, is powered by lithium-ion polymer batteries and can be remotely controlled by means of a dedicated Android application running on smartphones and tablets. Long-range communication between the patch and portable devices is performed by means of Bluetooth protocol. Different typologies of receiving inductors have been designed to minimize the size of the implantable device and reduce the discomfort of the patience. Multi-layer, printed spiral inductors and microfabricated spiral inductors have been designed, fabricated and tested. Both the approaches involve a sensibly smaller size, as compared to classic “pancake” inductors used for remote powering. Furthermore, the second solution enables the realization of the receiving inductor directly on the silicon substrate hosting the sensor, thus involving a further miniaturization of the implanted device. An integrated power module has been designed and fabricated in 0.18 μm CMOS technology to perform power management and data communication with the external patch. The circuit, to be merged with the sensor readout circuit, consists of an half-wave voltage rectifier, a low-dropout regulator, an amplitude demodulator and a load modulator. The module receives the power from the implanted inductor and provides a stable voltage to the sensor readout circuit. Finally, the amplitude demodulator and the load modulator enable short-range communication with the patch

Area- and Energy- Efficient Modular Circuit Architecture for 1,024-Channel Parallel Neural Recording Microsystem.

This research focuses to develop system architectures and associated electronic circuits for a next generation neuroscience research tool, a massive-parallel neural recording system capable of recording 1,024 channels simultaneously. Three interdependent prototypes have been developed to address major challenges in realization of the massive-parallel neural recording microsystems: minimization of energy and area consumption while preserving high quality in recordings. First, a modular 128-channel Δ-ΔΣ AFE using the spectrum shaping has been designed and fabricated to propose an area-and energy efficient solution for neural recording AFEs. The AFE achieved 4.84 fJ/C−s·mm2 figure of merit that is the smallest the area-energy product among the state-of-the-art multichannel neural recording systems. It also features power and area consumption of 3.05 µW and 0.05 mm2 per channel, respectively while exhibiting 63.3 dB signal-to-noise ratio with 3.02 µVrms input referred noise. Second, an on-chip mixed signal neural signal compressor was built to reduce the energy consumption in handling and transmission of the recorded data since this occupies a large portion of the total energy consumption as the number of parallel recording increases. The compressor reduces the data rates of two distinct groups of neural signals that are essential for neuroscience research: LFP and AP without loss of informative signals. As a result, the power consumptions for the data handling and transmissions of the LFP and AP were reduced to about 1/5.35 and 1/10.54 of the uncompressed cases, respectively. In the total data handling and transmission, the measured power consumption per channel is 11.98 µW that is about 1/9 of 107.5 µW without the compression. Third, a compact on-chip dc-to-dc converter with constant 1 MHz switching frequency has been developed to provide reliable power supplies and enhance energy delivery efficiency to the massive-parallel neural recording systems. The dc-to-dc converter has only predictable tones at the output and it exhibits > 80% power conversion efficiency at ultra-light loads, < 100 µW that is relevant power most of the multi-channel neural recording systems consume. The dc-to-dc converter occupies 0.375 mm2 of area which is less than 1/20 of the area the first prototype consumes (8.64 mm2).PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/133244/1/sungyun_1.pd

A Low-Power, Highly Stabilized Three-Electrode Potentiostat Using Subthreshold Techniques

Implantable micro- and nano- sensors and implantable microdevices (IMDs) have demonstrated potential for monitoring various physiological parameters such as glucose, lactate, CO2 [carbon dioxide], pH, etc. Potentiostats are essential components of electrochemical sensors such as glucose monitoring devices for diabetic patients. Diabetes is a metabolic disorder associated with insufficient production or inefficient utilization of insulin. The most important role of this enzyme is to regulate the metabolic breakdown of glucose generating the necessary energy for human activities. Diabetic patients typically monitor their blood glucose levels by pricking a fingertip with a lancing device and applying the blood to a glucose meter. This painful process may need to be repeated once before each meal and once 1- 4 hour after meal. Patients may need to inject insulin manually to keep the blood glucose level at 3.9-6.7 mmol [mili mol] /liter. Frequent glucose measurement can help reduce the long term complication of this disease which includes kidney disease, nerve damage, heart and blood vessel diseases, gum disease, glaucoma and etc. Having an implanted close loop insulin delivery system can help increase the frequency of glucose measurement and the accuracy of insulin injection. The implanted close loop system consists of three main blocks: (1) an electrochemical sensor in conjunction with a potentiostat to measure the blood glucose level, (2) a control block that defines the level of insulin injection and (3) an implanted insulin pump. To provide a continuous health-care monitoring the implantable unit has to be powered up using wireless techniques. Minimizing the power consumption associated with the implantable system can improve the battery life times or minimize the power transfer through the human body. The focus of this work is on the design of low-power potentiostats for the implantable glucose monitoring system. This work addresses the conventional structures in potentiostat design and the problems associated with these designs. Based on this discussion a modification is made to improve the stability without increasing the complexity of the system. The proposed design adopts a subthreshold biasing scheme for the design of a highly-stabilized, low-power potentiostats

Power Management and SRAM for Energy-Autonomous and Low-Power Systems

We demonstrate the two first-known, complete, self-powered millimeter-scale computer systems. These microsystems achieve zero-net-energy operation using solar energy harvesting and ultra-low-power circuits. A medical implant for monitoring intraocular pressure (IOP) is presented as part of a treatment for glaucoma. The 1.5mm3 IOP monitor is easily implantable because of its small size and measures IOP with 0.5mmHg accuracy. It wirelessly transmits data to an external wand while consuming 4.7nJ/bit. This provides rapid feedback about treatment efficacies to decrease physician response time and potentially prevent unnecessary vision loss. A nearly-perpetual temperature sensor is presented that processes data using a 2.1μW near-threshold ARM°R Cortex- M3TM μP that provides a widely-used and trusted programming platform. Energy harvesting and power management techniques for these two microsystems enable energy-autonomous operation. The IOP monitor harvests 80nW of solar power while consuming only 5.3nW, extending lifetime indefinitely. This allows the device to provide medical information for extended periods of time, giving doctors time to converge upon the best glaucoma treatment. The temperature sensor uses on-demand power delivery to improve low-load dc-dc voltage conversion efficiency by 4.75x. It also performs linear regulation to deliver power with low noise, improved load regulation, and tight line regulation. Low-power high-throughput SRAM techniques help millimeter-scale microsystems meet stringent power budgets. VDD scaling in memory decreases energy per access, but also decreases stability margins. These margins can be improved using sizing, VTH selection, and assist circuits, as well as new bitcell designs. Adaptive Crosshairs modulation of SRAM power supplies fixes 70% of parametric failures. Half-differential SRAM design improves stability, reducing VMIN by 72mV. The circuit techniques for energy autonomy presented in this dissertation enable millimeter-scale microsystems for medical implants, such as blood pressure and glucose sensors, as well as non-medical applications, such as supply chain and infrastructure monitoring. These pervasive sensors represent the continuation of Bell’s Law, which accurately traces the evolution of computers as they become smaller, more numerous, and more powerful. The development of millimeter-scale massively-deployed ubiquitous computers ensures the continued expansion and profitability of the semiconductor industry. NanoWatt circuit techniques will allow us to meet this next frontier in IC design.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/86387/1/grgkchen_1.pd

Ultra-thin and flexible CMOS technology: ISFET-based microsystem for biomedical applications

A new paradigm of silicon technology is the ultra-thin chip (UTC) technology and the emerging applications. Very thin integrated circuits (ICs) with through-silicon vias (TSVs) will allow the stacking and interconnection of multiple dies in a compact format allowing a migration towards three-dimensional ICs (3D-ICs). Also, extremely thin and therefore mechanically bendable silicon chips in conjunction with the emerging thin-film and organic semiconductor technologies will enhance the performance and functionality of large-area flexible electronic systems. However, UTC technology requires special attention related to the circuit design, fabrication, dicing and handling of ultra-thin chips as they have different physical properties compared to their bulky counterparts. Also, transistors and other active devices on UTCs experiencing variable bending stresses will suffer from the piezoresistive effect of silicon substrate which results in a shift of their operating point and therefore, an additional aspect should be considered during circuit design. This thesis tries to address some of these challenges related to UTC technology by focusing initially on modelling of transistors on mechanically bendable Si-UTCs. The developed behavioural models are a combination of mathematical equations and extracted parameters from BSIM4 and BSIM6 modified by a set of equations describing the bending-induced stresses on silicon. The transistor models are written in Verilog-A and compiled in Cadence Virtuoso environment where they were simulated at different bending conditions. To complement this, the verification of these models through experimental results is also presented. Two chips were designed using a 180 nm CMOS technology. The first chip includes nMOS and pMOS transistors with fixed channel width and two different channel lengths and two different channel orientations (0° and 90°) with respect to the wafer crystal orientation. The second chip includes inverter logic gates with different transistor sizes and orientations, as in the previous chip. Both chips were thinned down to ∼20m using dicing-before-grinding (DBG) prior to electrical characterisation at different bending conditions. Furthermore, this thesis presents the first reported fully integrated CMOS-based ISFET microsystem on UTC technology. The design of the integrated CMOS-based ISFET chip with 512 integrated on-chip ISFET sensors along with their read-out and digitisation scheme is presented. The integrated circuits (ICs) are thinned down to ∼30m and the bulky, as well as thinned ICs, are electrically and electrochemically characterised. Also, the thesis presents the first reported mechanically bendable CMOS-based ISFET device demonstrating that mechanical deformation of the die can result in drift compensation through the exploitation of the piezoresistive nature of silicon. Finally, this thesis presents the studies towards the development of on-chip reference electrodes and biodegradable and ultra-thin biosensors for the detection of neurotransmitters such as dopamine and serotonin

Wireless Transceivers for Implantable Microsystems.

In this thesis, we present the first-ever fully integrated mm3 low-power biomedical transceiver with 1 meter of range that is powered by a mm2 thin-film battery. The transceiver is targeted for biomedical implants where size and energy constraints dictated by application make design challenging. Despite all the previous work in RFID tags, form factor of such radios is incompatible with mm3 biomedical implants. The proposed transceiver bridges this gap by providing a compact low-power solution that can run off small thin-film batteries and can be stacked with other system components in a 3D fashion. On the sensor-to-external side, we proposed a novel FSK architecture based on dual-resonator LC oscillators to mitigate unwanted overlap of two FSK tones’ phase noise spectrum. Due to inherent complexity of such systems, fourth order dual-resonator oscillators can exhibit instable operation. We mathematically modeled the instability and derive design conditions for stable oscillations. Through simulation and measurements, validity of derived models was confirmed. Together with other low-power system blocks, the transmitter was successfully implanted in live mouse and in-vivo measurements were performed to confirm successful transmission of vital signals through organic tissue. The integrated transmitter achieved a bit-error-rate of 10-6 at 10cm with 4.7nJ/bit energy consumption. On the external-to-sensor link, we proposed a new protocol to lower receiver peak power, which is highly limited due to small size of mm3 microsystem battery. In the proposed protocol, sending same data multiple times drastically relaxes jitter requirement on the sensor side at the cost of increased power consumption on the external side without increasing peak power radiated by the external unit. The receiver also uses a dual-coil LNA to improve range by 22% with only 11% area overhead. An asynchronous controller manages protocol timing and limits total monitoring current to 43nA. The fabricated receiver consumes 1.6nJ/bit at 40kbps while positioned 1m away from a 2W source.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/102458/1/ghaed_1.pd

A TRANSCEIVER DESIGN FOR IMPLANTABLE MEDICAL DEVICES

Master'sMASTER OF ENGINEERIN