5 research outputs found
Combined Semi-definite Relaxation and Sphere Decoding Method for Multiple Antennas Systems
In this paper, a new detection method which combines the semi-definite programming relaxation (SDR) with the sphere decoding (SD) is proposed for 256-QAM multiple-input multiple-output (MIMO) system. In this method, the SDR algorithms are engaged to obtain a primary result. Then, a hyper-sphere is constructed which is centered at the received signal and has its radius equals to the Euclidean distance between the primary result and the received signal. Finally, the SD searching strategy is employed to determine the final result which satisfies the principle of maximum likelihood. Simulation results show that the proposed method can offer optimum BLER performance as well as lower computational complexity than the conventional SD detectors. © 2011 IEEE.published_or_final_versio
MIMO Detection for High-Order QAM Based on a Gaussian Tree Approximation
This paper proposes a new detection algorithm for MIMO communication systems
employing high order QAM constellations. The factor graph that corresponds to
this problem is very loopy; in fact, it is a complete graph. Hence, a
straightforward application of the Belief Propagation (BP) algorithm yields
very poor results. Our algorithm is based on an optimal tree approximation of
the Gaussian density of the unconstrained linear system. The finite-set
constraint is then applied to obtain a loop-free discrete distribution. It is
shown that even though the approximation is not directly applied to the exact
discrete distribution, applying the BP algorithm to the loop-free factor graph
outperforms current methods in terms of both performance and complexity. The
improved performance of the proposed algorithm is demonstrated on the problem
of MIMO detection
Comparison of Semidefinite Relaxation Detectors for High-Order Modulation MIMO Systems
published_or_final_versio
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Efficient VLSI architectures for MIMO and cryptography systems
Multiple-input multiple-output (MIMO) communication systems have recently been considered as one of the most significant technology breakthroughs for modern wireless communications, due to the higher spectral efficiency and improved link reliability. The sphere decoding algorithm (SDA) has been widely used for maximum likelihood (ML) detection in MIMO systems. It is of great interest to develop low-complexity and high-speed VLSI architectures for the MIMO sphere decoders.
The first part of this dissertation is focused on the low-complexity and high-speed sphere decoder design for the MIMO systems. It includes the algorithms simplification, and transformations, hardware optimization and architecture development. Specifically, we propose the layered reordered K-Best sphere decoding algorithm and dynamic K-best sphere decoding algorithm, which can significantly improve the detection performance or reduce the hardware complexity. We also present the efficient K-Best sorting architecture, which greatly simplifies the sorting operation of the K-Best SDA. In addition, we introduce the early-pruning K-Best SD scheme, which eliminates the unlikely candidate at early decoding stages, thus saves computational complexity and power consumptions. For the conventional sphere decoder design, we develop the parallel and pipeline interleaved sphere decoder architecture, which considerably increases the decoding throughput with negligible extra complexity. Finally, we design the efficient radius and list updating units for the list sphere decoder, which increases the speed of obtaining the new radius and reduces the complexity for generating the new candidate list.
The wireless communication technologies are widely used for the benefits of portability and flexibility. However, the wireless security is extremely important to protect the private and sensitive information since the communication medium, the airwave, is shared and open to the public. Cryptography is the most standard and efficient way for information protection.
The second part of this thesis is thus dedicated to the high-speed and efficient architecture design for the cryptography systems including ECC and Tate pairing. We propose an efficient fast architecture for the ECC in Lopez-Dahab projective coordinates. Compared with the conventional point operation implementations, the point addition and doubling operations can be significantly accelerated with reasonable hardware overhead by applying parallel processing and hardware reusing. Moreover, we develop a complexity reduction scheme and an overlapped processing architecture for the Tate pairing in characteristic three. The proposed architecture can achieve over 2 times speedup compared with conventional sequential implementations for the Duursma-Lee and Kwon-BGOS algorithms