318 research outputs found

    One way Doppler extractor. Volume 1: Vernier technique

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    A feasibility analysis, trade-offs, and implementation for a One Way Doppler Extraction system are discussed. A Doppler error analysis shows that quantization error is a primary source of Doppler measurement error. Several competing extraction techniques are compared and a Vernier technique is developed which obtains high Doppler resolution with low speed logic. Parameter trade-offs and sensitivities for the Vernier technique are analyzed, leading to a hardware design configuration. A detailed design, operation, and performance evaluation of the resulting breadboard model is presented which verifies the theoretical performance predictions. Performance tests have verified that the breadboard is capable of extracting Doppler, on an S-band signal, to an accuracy of less than 0.02 Hertz for a one second averaging period. This corresponds to a range rate error of no more than 3 millimeters per second

    Hardware simulation of Ku-band spacecraft receiver and bit synchronizer, volume 1

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    A hardware simulation which emulates an automatically acquiring transmit receive spread spectrum communication and tracking system and developed for use in future NASA programs involving digital communications is considered. The system architecture and tradeoff analysis that led to the selection of the system to be simulated is presented

    Low Power Adaptive Circuits: An Adaptive Log Domain Filter and A Low Power Temperature Insensitive Oscillator Applied in Smart Dust Radio

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    This dissertation focuses on exploring two low power adaptive circuits. One is an adaptive filter at audio frequency for system identification. The other is a temperature insensitive oscillator for low power radio frequency communication. The adaptive filter is presented with integrated learning rules for model reference estimation. The system is a first order low pass filter with two parameters: gain and cut-off frequency. It is implemented using multiple input floating gate transistors to realize online learning of system parameters. Adaptive dynamical system theory is used to derive robust control laws in a system identification task. Simulation results show that convergence is slower using simplified control laws but still occurs within milliseconds. Experimental results confirm that the estimated gain and cut-off frequency track the corresponding parameters of the reference filter. During operation, deterministic errors are introduced by mismatch within the analog circuit implementation. An analysis is presented which attributes the errors to current mirror mismatch. The harmonic distortion of the filter operating in different inversion is analyzed using EKV model numerically. The temperature insensitive oscillator is designed for a low power wireless network. The system is based on a current starved ring oscillator implemented using CMOS transistors instead of LC tank for less chip area and power consumption. The frequency variance with temperature is compensated by the temperature adaptive circuits. Experimental results show that the frequency stability from 5°C to 65°C has been improved 10 times with automatic compensation and at least 1 order less power is consumed than published competitors. This oscillator is applied in a 2.2GHz OOK transmitter and a 2.2GHz phase locked loop based FM receiver. With the increasing needs of compact antenna, possible high data rate and wide unused frequency range of short distance communication, a higher frequency phase locked loop used for BFSK receiver is explored using an LC oscillator for its capability at 20GHz. The success of frequency demodulation is demonstrated in the simulation results that the PLL can lock in 0.5μs with 35MHz lock-in range and 2MHz detection resolution. The model of a phase locked loop used for BFSK receiver is analyzed using Matlab

    Theory of phaselock techniques as applied to aerospace transponders

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    Phaselock techniques as applied to aerospace transponder

    New strategies for low noise, agile PLL frequency synthesis

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    Phase-Locked Loop based frequency synthesis is an essential technique employed in wireless communication systems for local oscillator generation. The ultimate goal in any design of frequency synthesisers is to generate precise and stable output frequencies with fast switching and minimal spurious and phase noise. The conflict between high resolution and fast switching leads to two separate integer synthesisers to satisfy critical system requirements. This thesis concerns a new sigma-delta fractional-N synthesiser design which is able to be directly modulated at high data rates while simultaneously achieving good noise performance. Measured results from a prototype indicate that fast switching, low noise and spurious free spectra are achieved for most covered frequencies. The phase noise of the unmodulated synthesiser was measured −113 dBc/Hz at 100 kHz offset from the carrier. The intermodulation effect in synthesisers is capable of producing a family of spurious components of identical form to fractional spurs caused in quantisation process. This effect directly introduces high spurs on some channels of the synthesiser output. Numerical and analytic results describing this effect are presented and amplitude and distribution of the resulting fractional spurs are predicted and validated against simulated and measured results. Finally an experimental arrangement, based on a phase compensation technique, is presented demonstrating significant suppression of intermodulation-borne spurs. A new technique, pre-distortion noise shaping, is proposed to dramatically reduce the impact of fractional spurs in fractional-N synthesisers. The key innovation is the introduction in the bitstream generation process of carefully-chosen set of components at identical offset frequencies and amplitudes and in anti-phase with the principal fractional spurs. These signals are used to modify the Σ-Δ noise shaping, so that fractional spurs are effectively cancelled. This approach can be highly effective in improving spectral purity and reduction of spurious components caused by the Σ-Δ modulator, quantisation noise, intermodulation effects and any other circuit factors. The spur cancellation is achieved in the digital part of the synthesiser without introducing additional circuitry. This technique has been convincingly demonstrated by simulated and experimental results

    Design and implementation of a low-cost FMCW imaging radar

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    Imaging radar systems have been predominantly developed using a coherent pulse radar approach, which is typically associated with expensive and complex hardware that usually requires a large amount of space. Hence, the use of such sensors is reserved to large organizations that can afford to purchase or develop them. This is unfortunate as there are numerous uses for imaging radar sensors in both military and civilian sectors. One of such uses lies in the agricultural sector and entails using imaging radar data to monitor crop development. As a result, a project was initiated at the University of Cape Town (UCT), in collaboration with droneSAR company, which aimed to develop a low-cost, compact, imaging radar that could be mounted on a small Unmanned Aerial Vehicle (UAV). The purpose of this research project is aimed at developing the first system prototype. The RadioCamera-S is the S-band FMCW radar, that was developed to test the architecture that could be utilised to enable the filtering of the feed-through and nadir components, which are typically the strongest returns in the spectrum. The prototype has two modes of operation that are aimed at shifting the unwanted signals outside of the pass band of the receiver. This is achieved by generating two identical L-FMCW waveforms that are offset by a chosen time period. This enables a shift of the spectrum by the frequency, which corresponds to the time offset. The capabilities of the proposed hardware were examined and the specifications for the ground based version were developed. The parameters that influence the wave-form design were discussed and the optimal values were chosen for the ground based radar system. Verification of the transmitter and receiver operation was carried out, which was followed by system tests that demonstrated that the feed-through signal could be attenuated by employing the first proposed mode of operation. RTI plots were generated and showed that the radar was capable of detecting the movement of a reflector in the observable scene

    High Fidelity Satellite Navigation Receiver Front-End for Advanced Signal Quality Monitoring and Authentication

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    Over the last several years, interest in utilizing foreign satellite timing and navigation (satnav) signals to augment GPS has grown. Doing so is not without risks; foreign satnav signals must be vetted and determined to be trustworthy before use in military applications. Advanced signal quality monitoring methods can help to ensure that only authentic and reliable satnav signals are utilized. To effectively monitor and authenticate signals, the front-end must impress as little distortions upon the received signal as possible. The purpose of this study is to design, fabricate, and test the performance of a high-fidelity satnav receiver front-end for advanced monitoring of foreign and domestic space vehicle signals

    Software breadboard study

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    The overall goal of this study was to develop new concepts and technology for the Comet Rendezvous Asteroid Flyby (CRAF), Cassini, and other future deep space missions which maximally conform to the Functional Specification for the NASA X-Band Transponder (NXT), FM513778 (preliminary, revised July 26, 1988). The study is composed of two tasks. The first task was to investigate a new digital signal processing technique which involves the processing of 1-bit samples and has the potential for significant size, mass, power, and electrical performance improvements over conventional analog approaches. The entire X-band receiver tracking loop was simulated on a digital computer using a high-level programming language. Simulations on this 'software breadboard' showed the technique to be well-behaved and a good approximation to its analog predecessor from threshold to strong signal levels in terms of tracking-loop performance, command signal-to-noise ratio and ranging signal-to-noise ratio. The successful completion of this task paves the way for building a hardware breadboard, the recommended next step in confirming this approach is ready for incorporation into flight hardware. The second task in this study was to investigate another technique which provides considerable simplification in the synthesis of the receiver first LO over conventional phase-locked multiplier schemes and in this approach, provides down-conversion for an S-band emergency receive mode without the need of an additional LO. The objective of this study was to develop methodology and models to predict the conversion loss, input RF bandwidth, and output RF bandwidth of a series GaAs FET sampling mixer and to breadboard and test a circuit design suitable for the X and S-band down-conversion applications

    Electrode length measurement in electric arc furnaces

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    Accurate measurement of electrode length in electric arc furnaces will result in decreased maintenance time, and improved plant productivity. This thesis describes the development of a microwave-based Soderberg electrode length-measurement system. Various methods of electrode-length measurement were investigated, and it was found that a microwave measurement system based on a conventional frequency modulated continuous wave (FMCW) radar presented the most feasible technique. In this system, microwaves are propagated down a waveguide placed in the electrode. As the waveguide melts, they continue propagating in the resulting cavity until they are reflected by the discontinuity at the bottom of the electrode. The time taken for the return journey to the bottom of the electrode and back is measured, and the electrode length calculated
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