Design of gracefully degradable hypercube-connected systems

We address the problem of modifying a hypercube computer by the addition of spare nodes and links to improve its fault tolerance, while maintaining a specified level of performance. The hypercube is modeled by a graph in which nodes represent processors and edges represent communication links. A new graph-based measure of performance degradation is introduced. This characterizes a fault-tolerant hypercube as k-fault-tolerant (k-FT) g-step-degradable (g-SD) if the removal of any k nodes reduces the dimension of the largest fault-free subcube by at most g. We show how to construct k-FT g-SD hypercubes for values of k up to 16 and g = 0, 1, or 2. Many of these designs are shown to be link- or degree-optimal. We also propose a construction method that uses small k-FT g-SD designs as seeds to construct k-FT g-SD designs of larger sizes. This results in fault-tolerant hypercubes in which reconfiguration can be first done locally and then easily extended to the entire system. The small number of added links and nodes is shown to be useful not only in increasing the fault tolerance of the underlying hypercube, but also in reducing the average internode distance.Peer Reviewedhttp://deepblue.lib.umich.edu/bitstream/2027.42/30347/1/0000749.pd

Resource placement, data rearrangement, and Hamiltonian cycles in torus networks

Many parallel machines, both commercial and experimental, have been/are being designed with toroidal interconnection networks. For a given number of nodes, the torus has a relatively larger diameter, but better cost/performance tradeoffs, such as higher channel bandwidth, and lower node degree, when compared to the hypercube. Thus, the torus is becoming a popular topology for the interconnection network of a high performance parallel computers. In a multicomputer, the resources, such as I/O devices or software packages, are distributed over the networks. The first part of the thesis investigates efficient methods of distributing resources in a torus network. Three classes of placement methods are studied. They are (1) distant-t placement problem: in this case, any non-resource node is at a distance of at most t from some resource nodes, (2) j-adjacency problem: here, a non-resource node is adjacent to at least j resource nodes, and (3) generalized placement problem: a non-resource node must be a distance of at most t from at least j resource nodes. This resource placement technique can be applied to allocating spare processors to provide fault-tolerance in the case of the processor failures. Some efficient spare processor placement methods and reconfiguration schemes in the case of processor failures are also described. In a torus based parallel system, some algorithms give best performance if the data are distributed to processors numbered in Cartesian order; in some other cases, it is better to distribute the data to processors numbered in Gray code order. Since the placement patterns may be changed dynamically, it is essential to find efficient methods of rearranging the data from Gray code order to Cartesian order and vice versa. In the second part of the thesis, some efficient methods for data transfer from Cartesian order to radix order and vice versa are developed. The last part of the thesis gives results on generating edge disjoint Hamiltonian cycles in k-ary n-cubes, hypercubes, and 2D tori. These edge disjoint cycles are quite useful for many communication algorithms

Proceedings of the 22nd Conference on Formal Methods in Computer-Aided Design – FMCAD 2022

The Conference on Formal Methods in Computer-Aided Design (FMCAD) is an annual conference on the theory and applications of formal methods in hardware and system verification. FMCAD provides a leading forum to researchers in academia and industry for presenting and discussing groundbreaking methods, technologies, theoretical results, and tools for reasoning formally about computing systems. FMCAD covers formal aspects of computer-aided system design including verification, specification, synthesis, and testing

Proceedings of the 22nd Conference on Formal Methods in Computer-Aided Design – FMCAD 2022

The Conference on Formal Methods in Computer-Aided Design (FMCAD) is an annual conference on the theory and applications of formal methods in hardware and system verification. FMCAD provides a leading forum to researchers in academia and industry for presenting and discussing groundbreaking methods, technologies, theoretical results, and tools for reasoning formally about computing systems. FMCAD covers formal aspects of computer-aided system design including verification, specification, synthesis, and testing