Aspects of system modelling in Hardware/Software partitioning

This paper addresses fundamental aspects of system modelling and partitioning algorithms in the area of Hardware/Software Codesign. Three basic system models for partitioning are presented and the consequences of partitioning according to each of these are analyzed. The analysis shows the importance of making a clear distinction between the model used for partitioning and the model used for evaluation. It also illustrates the importance of having a realistic hardware model such that hardware sharing can be taken into account. Finally, the importance of integrating scheduling and allocation with partitioning is demonstrated. 1 Introduction Hardware/software partitioning is often viewed as the synthesis of an architecture consisting of a single CPU and a single dedicated hardware component (full custom, FPGA, etc.) from an initial system specification, e.g., [1]. The aim of this paper is to emphasize the importance of clearly defining and reporting the partitioning model assumed by a pa..

PACE: A dynamic programming algorithm for hardware/software partitioning

. This paper presents the PACE partitioning algorithm which is used in the LYCOS co-synthesis system for partitioning control/dataflow graphs into hardwareand software parts. The algorithm is a dynamic programming algorithm which solves both the problem of minimizing system execution time with a hardware area constraint and the problem of minimizing hardware area with a system execution time constraint. The target architecture consists of a single microprocessor and a single hardware chip (ASIC, FPGA, etc.) which are connected by a communication channel. The algorithm incorporates a realistic communication model and thus attempts to minimize communication overhead. The time-complexity of the algorithm is O(n 2 \Delta A) and the space-complexity is O(n \Delta A) where A is the total area of the hardware chip and n the number of code fragments which may be placed in either hardware or software. 1 Introduction The hardware/software partitioning of a system specification onto a target..

Picasso : un outil de co-design matériel/logiciel pour la conception de systèmes embarqués

La réutilisation -- Les langages de spécification -- Exemple de langage de spédifications -- Les estimateurs -- Les outils de co-design existants -- L'Interface et les spécifications dans Picasso -- Architecture cible -- Algorithmes de transformation et génération -- Regroupement du code logiciel par instance de processeur -- Communication logicielle sur un mème processeur -- Implantation des types de données -- Raffinement des modules matériels -- Génération des modules ICHIP -- Génération des décodeurs de registres des ARCHI -- Génération du module ARCHI -- Le FIFO -- L'additionneur

An Approach to the Adaptation of Estimated Cost Parameters in the COSYMA System

Hardware/software partitioning is one of the key issues in hardware/software co-design. The system COSYMA uses simulated annealing based on estimated costs. Deviations between estimations and real costs seem unavoidable due to synthesis, compiler and communication effects. This paper describes an approach to adapt the estimation. The results show fast convergence of estimated to real costs