24 research outputs found
On the Designing of Spikes Band-Pass Filters for FPGA
In this paper we present two implementations of spike-based bandpass
filters, which are able to reject out-of-band frequency components in the
spike domain. First one is based on the use of previously designed spike-based
low-pass filters. With this architecture the quality factor, Q, is lower than 0.5.
The second implementation is inspired in the analog multi-feedback filters
(MFB) topology, it provides a higher than 1 Q factor, and ideally tends to
infinite. These filters have been written in VHLD, and synthesized for FPGA.
Two spike-based band-pass filters presented take advantages of the spike rate
coded representation to perform a massively parallel processing without complex
hardware units, like floating point arithmetic units, or a large memory. These low
requirements of hardware allow the integration of a high number of filters inside
a FPGA, allowing to process several spike coded signals fully in parallel.Ministerio de Ciencia e Innovación TEC2009-10639-C04-0
Spikes Monitors for FPGAs, an Experimental Comparative Study
In this paper we present and analyze two VHDL components for
monitoring internal activity of spikes fired by silicon neurons inside FPGAs.
These spikes monitors encode each spike according to the Address-Event Representation,
sending them through a time multiplexed digital bus as discrete
events, using different strategies. In order to study and analyze their behavior
we have designed an experimental scenario, where diverse AER systems have
been used to stimulate the spikes monitors and collect the output AER events,
for later analysis. We have applied a battery of tests on both monitors in order
to measure diverse features such as maximum spike load and AER event loss
due to collisions.Ministerio de Ciencia e Innovación TEC2009-10639-C04-02Ministerio de Economía y Competitividad TEC2012-37868-C04-0
Multilayer Spiking Neural Network for Audio Samples Classification Using SpiNNaker
Audio classification has always been an interesting subject of research
inside the neuromorphic engineering field. Tools like Nengo or Brian, and hardware
platforms like the SpiNNaker board are rapidly increasing in popularity in
the neuromorphic community due to the ease of modelling spiking neural
networks with them. In this manuscript a multilayer spiking neural network for
audio samples classification using SpiNNaker is presented. The network consists
of different leaky integrate-and-fire neuron layers. The connections between them
are trained using novel firing rate based algorithms and tested using sets of pure
tones with frequencies that range from 130.813 to 1396.91 Hz. The hit rate
percentage values are obtained after adding a random noise signal to the original
pure tone signal. The results show very good classification results (above 85 %
hit rate) for each class when the Signal-to-noise ratio is above 3 decibels, validating
the robustness of the network configuration and the training step.Ministerio de Economía y Competitividad TEC2012-37868-C04-02Junta de Andalucía P12-TIC-130
SVITE: A Spike-Based VITE Neuro-Inspired Robot Controller
This paper presents an implementation of a neuro-inspired algorithm
called VITE (Vector Integration To End Point) in FPGA in the spikes domain.
VITE aims to generate a non-planned trajectory for reaching tasks in robots.
The algorithm has been adapted to work completely in the spike domain under
Simulink simulations. The FPGA implementation consists in 4 VITE in parallel
for controlling a 4-degree-of-freedom stereo-vision robot. This work represents
the main layer of a complex spike-based architecture for robot neuro-inspired
reaching tasks in FPGAs. It has been implemented in two Xilinx FPGA
families: Virtex-5 and Spartan-6. Resources consumption comparative between
both devices is presented. Results obtained for Spartan device could allow
controlling complex robotic structures with up to 96 degrees of freedom per
FPGA, providing, in parallel, high speed connectivity with other neuromorphic
systems sending movement references. An exponential and gamma distribution
test over the inter spike interval has been performed to proof the approach to the
neural code proposed.Ministerio de Economía y Competitividad TEC2012-37868-C04-0
Simulating Building Blocks for Spikes Signals Processing
In this paper we will explain in depth how we have used Simulink
with the addition of Xilinx System Generation to design a simulation
framework for testing and analyzing neuro-inspired elements for spikes rate
coded signals processing. Those elements have been designed as building
blocks, which represent spikes processing primitives, combining them we have
designed more complex blocks, which behaves like analog frequency filter
using digital circuits. This kind of computation performs a massively parallel
processing without complex hardware units. Spikes processing building blocks
have been written in VHDL to be implemented for FPGA. Xilinx System
Generator allows co-simulating VHDL entities together with Simulink
components, providing an easy interface for presented building block
simulations and analysis.Ministerio de Ciencia e Innovación TEC2009-10639-C04-0
From Vision Sensor to Actuators, Spike Based Robot Control through Address-Event-Representation
One field of the neuroscience is the neuroinformatic whose aim is to
develop auto-reconfigurable systems that mimic the human body and brain. In
this paper we present a neuro-inspired spike based mobile robot. From
commercial cheap vision sensors converted into spike information, through
spike filtering for object recognition, to spike based motor control models. A
two wheel mobile robot powered by DC motors can be autonomously
controlled to follow a line drown in the floor. This spike system has been
developed around the well-known Address-Event-Representation mechanism to
communicate the different neuro-inspired layers of the system. RTC lab has
developed all the components presented in this work, from the vision sensor, to
the robot platform and the FPGA based platforms for AER processing.Ministerio de Ciencia e Innovación TEC2006-11730-C03-02Junta de Andalucía P06-TIC-0141
An AER Spike-Processing Filter Simulator and Automatic VHDL Generator Based on Cellular Automata
Spike-based systems are neuro-inspired circuits implementations
traditionally used for sensory systems or sensor signal processing. Address-Event-
Representation (AER) is a neuromorphic communication protocol for transferring
asynchronous events between VLSI spike-based chips. These neuro-inspired
implementations allow developing complex, multilayer, multichip neuromorphic
systems and have been used to design sensor chips, such as retinas and cochlea,
processing chips, e.g. filters, and learning chips. Furthermore, Cellular Automata
(CA) is a bio-inspired processing model for problem solving. This approach
divides the processing synchronous cells which change their states at the same time
in order to get the solution. This paper presents a software simulator able to gather
several spike-based elements into the same workspace in order to test a CA
architecture based on AER before a hardware implementation. Furthermore this
simulator produces VHDL for testing the AER-CA into the FPGA of the USBAER
AER-tool.Ministerio de Ciencia e Innovación TEC2009-10639-C04-0
NAVIS: Neuromorphic Auditory VISualizer Tool
This software presents diverse utilities to perform the first post-processing layer taking the neuromorphic auditory sensors (NAS) information. The used NAS implements in FPGA a cascade filters architecture, imitating the behavior of the basilar membrane and inner hair cells and working with the sound information decomposed into its frequency components as spike streams. The well-known neuromorphic hardware interface Address-Event-Representation (AER) is used to propagate auditory information out of the NAS, emulating the auditory vestibular nerve. Using the information packetized into aedat files, which are generated through the jAER software plus an AER to USB computer interface, NAVIS implements a set of graphs that allows to represent the auditory information as cochleograms, histograms, sonograms, etc. It can also split the auditory information into different sets depending on the activity level of the spike streams. The main contribution of this software tool is that it allows complex audio post-processing treatments and representations, which is a novelty for spike-based systems in the neuromorphic community and it will help neuromorphic engineers to build sets for training spiking neural networks (SNN).Ministerio de Economía y Competitividad TEC2012-37868-C04-0
Neuromorphic Learning towards Nano Second Precision
Temporal coding is one approach to representing information in spiking neural
networks. An example of its application is the location of sounds by barn owls
that requires especially precise temporal coding. Dependent upon the azimuthal
angle, the arrival times of sound signals are shifted between both ears. In
order to deter- mine these interaural time differences, the phase difference of
the signals is measured. We implemented this biologically inspired network on a
neuromorphic hardware system and demonstrate spike-timing dependent plasticity
on an analog, highly accelerated hardware substrate. Our neuromorphic
implementation enables the resolution of time differences of less than 50 ns.
On-chip Hebbian learning mechanisms select inputs from a pool of neurons which
code for the same sound frequency. Hence, noise caused by different synaptic
delays across these inputs is reduced. Furthermore, learning compensates for
variations on neuronal and synaptic parameters caused by device mismatch
intrinsic to the neuromorphic substrate.Comment: 7 pages, 7 figures, presented at IJCNN 2013 in Dallas, TX, USA. IJCNN
2013. Corrected version with updated STDP curves IJCNN 201
An AER to CAN Bridge for Spike-Based Robot Control
Address-Event-Representation (AER) is a bio-inspired communication
protocol between chips. A set of AER sensors (retina and cochleas), processors
(convolvers, WTA, mappers, …) and actuators can be found in the literature that
have been specifically designed for mimicking the communication principle in the
brain: spikes. The problem when developing complex robots based on AER (or
spikes) is to command actuators (motors) directly with spikes. Commercial robots
are usually based on commercial standards (CAN) that do not allow powering
actuators directly with spikes. This paper presents a co-design FPGA and
embedded computer system that implements a bridge between these two protocols:
CAN and AER. The bridge has been analyzed under the Spanish project
VULCANO1 with an arm robot and a Shadow anthropomorphic hand.Ministerio de Ciencia e Innovación TEC2009-10639-C04-0