SARA: Self-Aware Resource Allocation for Heterogeneous MPSoCs

In modern heterogeneous MPSoCs, the management of shared memory resources is crucial in delivering end-to-end QoS. Previous frameworks have either focused on singular QoS targets or the allocation of partitionable resources among CPU applications at relatively slow timescales. However, heterogeneous MPSoCs typically require instant response from the memory system where most resources cannot be partitioned. Moreover, the health of different cores in a heterogeneous MPSoC is often measured by diverse performance objectives. In this work, we propose a Self-Aware Resource Allocation (SARA) framework for heterogeneous MPSoCs. Priority-based adaptation allows cores to use different target performance and self-monitor their own intrinsic health. In response, the system allocates non-partitionable resources based on priorities. The proposed framework meets a diverse range of QoS demands from heterogeneous cores.Comment: Accepted by the 55th annual Design Automation Conference 2018 (DAC'18

MorphIC: A 65-nm 738k-Synapse/mm2^2 Quad-Core Binary-Weight Digital Neuromorphic Processor with Stochastic Spike-Driven Online Learning

Recent trends in the field of neural network accelerators investigate weight quantization as a means to increase the resource- and power-efficiency of hardware devices. As full on-chip weight storage is necessary to avoid the high energy cost of off-chip memory accesses, memory reduction requirements for weight storage pushed toward the use of binary weights, which were demonstrated to have a limited accuracy reduction on many applications when quantization-aware training techniques are used. In parallel, spiking neural network (SNN) architectures are explored to further reduce power when processing sparse event-based data streams, while on-chip spike-based online learning appears as a key feature for applications constrained in power and resources during the training phase. However, designing power- and area-efficient spiking neural networks still requires the development of specific techniques in order to leverage on-chip online learning on binary weights without compromising the synapse density. In this work, we demonstrate MorphIC, a quad-core binary-weight digital neuromorphic processor embedding a stochastic version of the spike-driven synaptic plasticity (S-SDSP) learning rule and a hierarchical routing fabric for large-scale chip interconnection. The MorphIC SNN processor embeds a total of 2k leaky integrate-and-fire (LIF) neurons and more than two million plastic synapses for an active silicon area of 2.86mm$^2$ in 65nm CMOS, achieving a high density of 738k synapses/mm$^2$. MorphIC demonstrates an order-of-magnitude improvement in the area-accuracy tradeoff on the MNIST classification task compared to previously-proposed SNNs, while having no penalty in the energy-accuracy tradeoff.Comment: This document is the paper as accepted for publication in the IEEE Transactions on Biomedical Circuits and Systems journal (2019), the fully-edited paper is available at https://ieeexplore.ieee.org/document/876400

An implementation of task processing on 4G-based mobile-edge computing systems

Mobile Edge Computing (MEC) is a new technology that facilitates low-latency cloud services to mobile devices (MDs) by pushing mobile computing, storage and network control to the network edge (closer to MDs), thereby prolonging the battery lifetime of MDs. One of the main objectives of MEC is to reduce latency and permit delay-sensitive applications in 4G and in the future, 5G communications. To achieve this feat, MEC aims to build up a computing platform by deploying edge servers (ESs) on the network edge. There is, therefore, a push to test the MEC performance on existinMobile Edge Computing (MEC) is a new technology that facilitates low-latency cloud services to mobile devices (MDs) by pushing mobile computing, storage and network control to the network edge, thereby prolonging the battery lifetime of MDs. Besides, MEC aims to reduce latency and permit delay-sensitive applications in 4G communications. There is, therefore, a push to test MEC performance on existing cellular systems. With the recently available mobile platform for academia SINET, NII can now connect MDs to ESs through 4G. This project focuses on the implementation of a physical 4G-based MEC System for task offloading, in which with the goal of achieving face detection, MD partially offload tasks to the ES under the instructions dictated by the offloading algorithms. Accordingly, the objectives of this thesis are to prove the efficiency of LTE based MEC systems in the real world focusing on its performance in terms of latency and battery consumption