Estudo comparativo entre técnicas de controle lineares e não-lineares implementadas em FPGA aplicadas a um inversor de tensão NPC três níveis monofásicos

This work presents a comparative study, design and implementation of linear and nonlinear control techniques applied on power electronics converters. The main objective of this study is to control the output voltage and the voltage balance between the DC bus voltage capacitors balance of a three level NPC inverter. The control techniques used are the classic PID, the ANLPID-GGF, LQR and SDRE. The Non-Linear PID – Gaussian Gain Functions is considered a new nonlinear control technique used for optimization of the classic linear PID control. Taken the converter transfer function, the designs of the four controllers are set so the operating point of the closed loop system presents the same natural frequency. Thus, the comparative analysis of the performance of each control can be performed more precisely. The pole placement technique is used to design the LQR and SDRE controllers. By means of a comparative analysis of the controllers, it a parallel combination of the designed controllers is also proposed, yielding a weighted adaptive control system. The weighted adaptive controller improves the system performance, both in response time and in controlled magnitudes overshoots reduction. The four control techniques and the strategy an adaptive control proposed are implemented on FPGA, using the DSP Builder tool for the development and compilation the VHDL code. Simulation results are presented in order to validate the proposed theoretical development.Este trabalho apresenta um estudo comparativo, o projeto e a implementação de técnicas de controle lineares e não-lineares aplicadas em conversores estáticos de energia elétrica. O principal objetivo deste estudo é controlar, tanto a tensão de saída como o equilíbrio das tensões dos capacitores do barramento CC (Corrente Contínua) de um inversor NPC (Neutral Point Campled) três níveis monofásico. As técnicas de controle utilizadas são o PID (Proporcional-Integral-Derivativo), o ANLPID-GGF (Adaptive Non Linear PID – Gaussian Like Gain Functions), o LQR (Linear Quadratic Regulator) e o SDRE (State Dependent Riccati Equation). O ANLPID-GGF é uma proposta de otimização do controlador PID convencional utilizando funções de ganhos variáveis. Todos os controladores são projetados para manter os mesmos pólos dominantes (autovalores) do sistema em malha fechada de acordo com o modelo do conversor. Desta forma é possível realizar uma comparação mais coerente entre as quatro técnicas de controles estudadas. Com a determinação dos pólos dominantes do sistema é realizado o projeto dos controladores LQR e SDRE por alocação de pólos. Com o projeto por alocação de pólos pode-se evitar os sobre sinais comuns nas aplicações que utilizam controladores LQR e SDRE. Através da análise comparativa entre os quatro controladores, pode-se identificar as características distintas de cada método. Desta forma, também é proposta uma implementação paralela de controladores onde é feita uma associação ponderada entre as leis de controle, dando origem a uma estratégia de controle adaptativo ponderado que melhora o desempenho do sistema, tanto em tempo de resposta quanto na redução dos overshoots. As quatro técnicas de controle utilizadas e a estratégia proposta do controle adaptativo são implementadas em FPGA (Field Programmable Gate Array), utilizando a ferramenta DSP Builder para desenvolvimento e compilação do código HDL (Linguagem de Descrição de Hardware). Resultados de simulações e experimentais são apresentados com o objetivo de validar o desenvolvimento teórico proposto

Three-level neutral point-clamped (NPC) traction inverter drive for electric vehicles

The motivation of this project was to develop a three level neutral point clamped (NPC) traction inverter for a permanent magnet synchronous machine drive. The three-level inverter helps to reduce the total inverter losses at higher switching frequencies, compared to a two-level inverter for electric vehicle applications. The three-level inverter has also more power switches compared to the two-level inverter. This helps to reduce the voltage stress across the switches and the machine winding. In addition, it also allows an increase in the DC-link voltage, which in turn helps to reduce the DC-link current, phase conductor size and the associated losses. Moreover, at higher DC-bus voltages the power switches will have lower thermal stress when compared to the 2-level. However, the NPC inverter topologies have an inherent problem of DC-link voltage balancing. In the initial part of this thesis, a novel space vector based DC-link voltage balancing strategy is proposed. This strategy can keep the two DC-link capacitor voltages balanced during transient changes in both speed and torque. The performance of the three-level inverter system is then compared with a two-level inverter based drive to validate its performance improvement. The results showed a significant reduction in total voltage and current harmonic distortions, reduced total inverter losses (by 2/3rd) and was even was able to keep the neutral point fluctuation low at all operating load power factor conditions. The second motivation of this thesis was to reduce the computational time in the real-time implementation of the control logic. For this purpose, a modified carrier and hybrid-carrier based PWM strategy was proposed, which also kept the DC-link capacitor voltages balanced. The modified carrier based strategy was able to reduce the switching losses compared to the conventional strategies, while the hybrid-carrier based strategy kept the advantages of both carrier and the space vector techniques. Finally, a performance comparison study was carried out to compare the total harmonic distortion, switching loss distribution, and total inverter loss of all the four proposed strategies