High Performance Power Management Integrated Circuits for Portable Devices

abstract: Portable devices often require multiple power management IC (PMIC) to power different sub-modules, Li-ion batteries are well suited for portable devices because of its small size, high energy density and long life cycle. Since Li-ion battery is the major power source for portable device, fast and high-efficiency battery charging solution has become a major requirement in portable device application. In the first part of dissertation, a high performance Li-ion switching battery charger is proposed. Cascaded two loop (CTL) control architecture is used for seamless CC-CV transition, time based technique is utilized to minimize controller area and power consumption. Time domain controller is implemented by using voltage controlled oscillator (VCO) and voltage controlled delay line (VCDL). Several efficiency improvement techniques such as segmented power-FET, quasi-zero voltage switching (QZVS) and switching frequency reduction are proposed. The proposed switching battery charger is able to provide maximum 2 A charging current and has an peak efficiency of 93.3%. By configure the charger as boost converter, the charger is able to provide maximum 1.5 A charging current while achieving 96.3% peak efficiency. The second part of dissertation presents a digital low dropout regulator (DLDO) for system on a chip (SoC) in portable devices application. The proposed DLDO achieve fast transient settling time, lower undershoot/overshoot and higher PSR performance compared to state of the art. By having a good PSR performance, the proposed DLDO is able to power mixed signal load. To achieve a fast load transient response, a load transient detector (LTD) enables boost mode operation of the digital PI controller. The boost mode operation achieves sub microsecond settling time, and reduces the settling time by 50% to 250 ns, undershoot/overshoot by 35% to 250 mV and 17% to 125 mV without compromising the system stability.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

Antennas using left handed transmission lines

The research described in this thesis is concerned with the analysis and design of conventional wire antenna types, dipoles and loops, based on the left-handed transmission line approach. The left handed antennas have a unique feature that the wavelength of the induced current becomes shorter with decreasing frequency. The left handed transmission line concept can be extended to construct reduced-size dipole or loop antennas in the VHF frequency band. The use of higher order modes allows orthogonal polarisation to be obtained, which is thought to be a feature unique to these antennas. Efficiency is a key parameter of left handed antennas as the heavy left handed loading increases the resistive loss. A study of the efficiency of small dipole antennas loaded with a left-handed transmission line is specially described, and the comparison with conventional inductive loading dipoles. In a low order mode, the efficiency of L-loading dipole is better with low number of unit cell. If the number of cell increases, CL-loading presents comparable and even better performance. In a high mode the meandered left handed dipole gives the best efficiency due to the phase distribution, presenting orthogonal polarization as well. The optimized dipole loaded with parallel plate capacitors and spiral inductors presents the best performance in impedance and efficiency, even better than the conventional inductive loading. A planar loop antenna using a ladder network of left handed loading is also presented. Various modes can be obtained in the left handed loop antenna. The zero order mode gives rise to omnidirectional patterns in the plane of the loop, with good efficiency. By loading the loop with active components, varactors, a tunable left handed loop antenna with a switchable radiation pattern is implemented. The loop gives an omnidirectional pattern with a null to z axis while working in an n = 0 mode and can switch to a pattern with a null at phi = 45° in the plane of the loop in an n = 2 mode

Metamaterials and Metasurfaces

Ye

On-chip adaptive power management for WPT-Enabled IoT

Internet of Things (IoT), as broadband network connecting every physical objects, is becoming more widely available in various industrial, medical, home and automotive applications. In such network, the physical devices, vehicles, medical assistance, and home appliances among others are supposed to be embedded by sensors, actuators, radio frequency (RF) antennas, memory, and microprocessors, such that these devices are able to exchange data and connect with other devices in the network. Among other IoT’s pillars, wireless sensor network (WSN) is one of the main parts comprising massive clusters of spatially distributed sensor nodes dedicated for sensing and monitoring environmental conditions. The lifetime of a WSN is greatly dependent on the lifetime of the small sensor nodes, which, in turn, is primarily dependent on energy availability within every sensor node. Predominantly, the main energy source for a sensor node is supplied by a small battery attached to it. In a large WSN with massive number of deployed sensor nodes, it becomes a challenge to replace the batteries of every single sensor node especially for sensor nodes deployed in harsh environments. Consequently, powering the sensor nodes becomes a key limiting issue, which poses important challenges for their practicality and cost. Therefore, in this thesis we propose enabling WSN, as the main pillar of IoT, by means of resonant inductive coupling (RIC) wireless power transfer (WPT). In order to enable efficient energy delivery at higher range, high quality factor RIC-WPT system is required in order to boost the magnetic flux generated at the transmitting coil. However, an adaptive front-end is essential for self-tuning the resonant tank against any mismatch in the components values, distance variation, and interference from close metallic objects. Consequently, the purpose of the thesis is to develop and design an adaptive efficient switch-mode front-end for self-tuning in WPT receivers in multiple receiver system. The thesis start by giving background about the IoT system and the technical bottleneck followed by the problem statement and thesis scope. Then, Chapter 2 provides detailed backgrounds about the RIC-WPT system. Specifically, Chapter 2 analyzes the characteristics of different compensation topologies in RIC-WPT followed by the implications of mistuning on efficiency and power transfer capability. Chapter 3 discusses the concept of switch-mode gyrators as a potential candidate for generic variable reactive element synthesis while different potential applications and design cases are provided. Chapter 4 proposes two different self-tuning control for WPT receivers that utilize switch-mode gyrators as variable reactive element synthesis. The performance aspects of control approaches are discussed and evaluated as well in Chapter 4. The development and exploration of more compact front-end for self-tuned WPT receiver is investigated in Chapter 5 by proposing a phase-controlled switched inductor converter. The operation and design details of different switch-mode phase-controlled topologies are given and evaluated in the same chapter. Finally, Chapter 6 provides the conclusions and highlight the contribution of the thesis, in addition to suggesting the related future research topics.Internet de las cosas (IoT), como red de banda ancha que interconecta cualquier cosa, se está estableciendo como una tecnología valiosa en varias aplicaciones industriales, médicas, domóticas y en el sector del automóvil. En dicha red, los dispositivos físicos, los vehículos, los sistemas de asistencia médica y los electrodomésticos, entre otros, incluyen sensores, actuadores, subsistemas de comunicación, memoria y microprocesadores, de modo que son capaces de intercambiar datos e interconectarse con otros elementos de la red. Entre otros pilares que posibilitan IoT, la red de sensores inalámbricos (WSN), que es una de las partes cruciales del sistema, está formada por un conjunto masivo de nodos de sensado distribuidos espacialmente, y dedicados a sensar y monitorizar las condiciones del contexto de las cosas interconectadas. El tiempo de vida útil de una red WSN depende estrechamente del tiempo de vida de los pequeños nodos sensores, los cuales, a su vez, dependen primordialmente de la disponibilidad de energía en cada nodo sensor. La fuente principal de energía para un nodo sensor suele ser una pequeña batería integrada en él. En una red WSN con muchos nodos y con una alta densidad, es un desafío el reemplazar las baterías de cada nodo sensor, especialmente en entornos hostiles, como puedan ser en escenarios de Industria 4.0. En consecuencia, la alimentación de los nodos sensores constituye uno de los cuellos de botella que limitan un despliegue masivo práctico y de bajo coste. A tenor de estas circunstancias, en esta tesis doctoral se propone habilitar las redes WSN, como pilar principal de sistemas IoT, mediante sistemas de transferencia inalámbrica de energía (WPT) basados en acoplamiento inductivo resonante (RIC). Con objeto de posibilitar el suministro eficiente de energía a mayores distancias, deben aumentarse los factores de calidad de los elementos inductivos resonantes del sistema RIC-WPT, especialmente con el propósito de aumentar el flujo magnético generado por el inductor transmisor de energía y su acoplamiento resonante en recepción. Sin embargo, dotar al cabezal electrónico que gestiona y condicionada el flujo de energía de capacidad adaptativa es esencial para conseguir la autosintonía automática del sistema acoplado y resonante RIC-WPT, que es muy propenso a la desintonía ante desajustes en los parámetros nominales de los componentes, variaciones de distancia entre transmisor y receptores, así como debido a la interferencia de objetos metálicos. Es por tanto el objetivo central de esta tesis doctoral el concebir, proponer, diseñar y validar un sistema de WPT para múltiples receptores que incluya funciones adaptativas de autosintonía mediante circuitos conmutados de alto rendimiento energético, y susceptible de ser integrado en un chip para el condicionamiento de energía en cada receptor de forma miniaturizada y desplegable de forma masiva. La tesis empieza proporcionando una revisión del estado del arte en sistemas de IoT destacando el reto tecnológico de la alimentación energética de los nodos sensores distribuidos y planteando así el foco de la tesis doctoral. El capítulo 2 sigue con una revisión crítica del statu quo de los sistemas de transferencia inalámbrica de energía RIC-WPT. Específicamente, el capítulo 2 analiza las características de diferentes estructuras circuitales de compensación en RIC-WPT seguido de una descripción crítica de las implicaciones de la desintonía en la eficiencia y la capacidad de transferencia energética del sistema. El capítulo 3 propone y explora el concepto de utilizar circuitos conmutados con función de girador como potenciales candidatos para la síntesis de propósito general de elementos reactivos variables sintonizables electrónicamente, incluyendo varias aplicaciones y casos de uso. El capítulo 4 propone dos alternativas para métodos y circuitos de control para la autosintonía de receptores de energíaPostprint (published version

High-Performance On-Chip Microwave Photonic Signal Processing Using Linear and Nonlinear Optics

Manipulating and processing radio-frequency (RF) signals using integrated photonic devices has recently emerged as a paradigm-shifting technology for future microwave applications. This emerging technique is referred to as integrated microwave photonics (IMWP) which enables the high-frequency processing and unprecedentedly wideband tunability in compact photonic circuits, with significantly enhanced stability and robustness. However, to find widespread applications, the performance of IMWP devices must meet or exceed the achievable performance of conventional electronic counterparts. The work presented in this thesis investigates high-performance IMWP signal processing from two aspects: the optimized IMWP processing schemes and the photonic integration. Firstly, we explore novel schemes to improve the performance of chip-based microwave photonic subsystems, such as RF delay lines and RF filters which are basic building blocks of RF systems. A phase amplification technique is demonstrated to achieve a Si3N4 chip-based RF time delay with a delay tuning speed at gigahertz level. A new scheme to achieve an all-optimized RF photonic notch filter is demonstrated, producing a record-high RF link performance and complete functionalities. To unlock the potential of RF signal processing, we investigate a new filter concept of pairing linear and nonlinear optics for a high-performance RF photonic filter. To reduce the footprint of the novel IMWP filter, the photonic integration of both the ring resonators and Brillouin-active circuits on the same photonic chip is achieved. To eliminate the use of integrated optical circulators for on-chip SBS, on-chip backward inter-modal stimulated Brillouin scattering is predicted and experimentally demonstrated in a Si-Chalcogenide hybrid integrated photonic platform. The study and demonstrations presented in this thesis make the first viable step towards high-performance IMWP signal processing for real-world RF applications

Energy management techniques for ultra-small bio-medical implants

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.Includes bibliographical references (p. 167-174).Trends in the medical industry have created a growing demand for implantable medical devices. In particular, the need to provide medical professionals a means to continuously monitor bio-markers over long time scales with increased precision is paramount to efficient healthcare. To make medical implants more attractive, there is a need to reduce their size and power consumption. Small medical implants would allow for less invasive procedures and greater comfort for patients. The two primary limitations to the size of small medical implants are the batteries that provide energy to circuit and sensor components, and the antennas that enable wireless communication to terminals outside of the body. In this work we present energy management and low-power techniques to help solve the engineering challenges posed by using ultracapacitors for energy storage. A major problem with using any capacitor as an energy source is the fact that its voltage drops rapidly with decreasing charge. This leaves the circuit to cope with a large supply variation and can lead to energy being left on the capacitor when its voltage gets too low to supply a sufficient supply voltage for operation. Rather than use a single ultracapacitor, we demonstrate higher energy utilization by splitting a single capacitor into an array of capacitors that are progressively reconfigured as energy is drawn out. An energy management IC fabricated in 180-nm CMOS implements a stacking procedure that allows for more than 98% of the initial energy stored in the ultracapacitors to be removed before the output voltage drops unsuitably low for circuit operation. The second part of this work develops techniques for wide-input-range energy management. The first chip implementing stacking suffered an efficiency penalty by using a switchedcapacitor voltage regulator with only a single conversion ratio. In a second implementation, we introduce a better solution that preserves efficiency performance by using a multiple conversion ratio switched-capacitor voltage regulator. At any given input voltage from an ultracapcitor array, the switched-capacitor voltage regulator is configured to maximize efficiency. Fabricated in a 180-nm CMOS process, the chip achieves a peak efficiency of 90% and the efficiency does not fall below 70% for input voltages between 1.25 and 3 V.by William R. Sanchez.Ph.D

1-D broadside-radiating leaky-wave antenna based on a numerically synthesized impedance surface

A newly-developed deterministic numerical technique for the automated design of metasurface antennas is applied here for the first time to the design of a 1-D printed Leaky-Wave Antenna (LWA) for broadside radiation. The surface impedance synthesis process does not require any a priori knowledge on the impedance pattern, and starts from a mask constraint on the desired far-field and practical bounds on the unit cell impedance values. The designed reactance surface for broadside radiation exhibits a non conventional patterning; this highlights the merit of using an automated design process for a design well known to be challenging for analytical methods. The antenna is physically implemented with an array of metal strips with varying gap widths and simulation results show very good agreement with the predicted performance

Beam scanning by liquid-crystal biasing in a modified SIW structure

A fixed-frequency beam-scanning 1D antenna based on Liquid Crystals (LCs) is designed for application in 2D scanning with lateral alignment. The 2D array environment imposes full decoupling of adjacent 1D antennas, which often conflicts with the LC requirement of DC biasing: the proposed design accommodates both. The LC medium is placed inside a Substrate Integrated Waveguide (SIW) modified to work as a Groove Gap Waveguide, with radiating slots etched on the upper broad wall, that radiates as a Leaky-Wave Antenna (LWA). This allows effective application of the DC bias voltage needed for tuning the LCs. At the same time, the RF field remains laterally confined, enabling the possibility to lay several antennas in parallel and achieve 2D beam scanning. The design is validated by simulation employing the actual properties of a commercial LC medium

PROCESS AWARE ANALOG-CENTRIC SINGLE LEAD ECG ACQUISITION AND CLASSIFICATION CMOS FRONTEND

The primary objective of this research work is the development of a low power single-lead ECG analog front-end (AFE) architecture which includes acquisition, digitization, process aware efficient gain and frequency control mechanism and a low complexity classifier for the detecting asystole, extreme bardycardia and tachycardia. Recent research on ECG recording systems focuses on the design of a compact single-lead wearable/portable devices with ultra-low-power consumption and in-built hardware for diagnosis and prognosis. Since, the amplitude of the ECG signal varies from hundreds of µV to a few mV, and has a bandwidth of DC to 250 Hz, conventional front-ends use an instrument amplifier followed by a programmable gain amplifier (PGA) to amplify the input ECG signal appropriately. This work presents an mixed signal ECG fronted with an ultra-low power two-stage capacitive-coupled signal conditioning circuit (or an AFE), providing programmable amplification along with tunable 2nd order high pass and lowpass filter characteristics. In the contemporary state-of-the-art ECG recording systems, the gain of the amplifier is controlled by external digital control pins which are in turn dynamically controlled through a DSP. Therefore, an efficient automatic gain control mechanism with minimal area overhead and consuming power in the order of nano watts only. The AGC turns the subsequent ADC on only after output of the PGA (or input of the ADC) reaches a level for which the ADC achieves maximum signal-to-noise-ratio (SNR), hence saving considerable startup power and avoiding the use of DSP. Further, in any practical filter design, the low pass cut-off frequency is prone to deviate from its nominal value across process and temperature variations. Therefore, post-fabrication calibration is essential, before the signal is fed to an ADC, to minimize this deviation, prevent signal degradation due to aliasing of higher frequencies into the bandwidth for classification of ECG signals, to switch to low resolution processing, hence saving power and enhances battery lifetime. Another short-coming noticed in the literature published so far is that the classification algorithm is implemented in digital domain, which turns out to be a power hungry approach. Moreover, Although analog domain implementations of QRS complexes detection schemes have been reported, they employ an external micro-controller to determine the threshold voltage. In this regard, finally a power-efficient low complexity CMOS fully analog classifier architecture and a heart rate estimator is added to the above scheme. It reduces the overall system power consumption by reducing the computational burden on the DSP. The complete proposed scheme consists of (i) an ultra-low power QRS complex detection circuit using an autonomous dynamic threshold voltage, hence discarding the need of any external microcontroller/DSP and calibration (ii) a power efficient analog classifier for the detection of three critical alarm types viz. asystole, extreme bradycardia and tachycardia. Additionally, a heart rate estimator that provides the number of QRS complexes within a period of one minute for cardiac rhythm (CR) and heart rate variability (HRV) analysis. The complete proposed architecture is implemented in UMC 0.18 µm CMOS technology with 1.8 V supply. The functionality of each of the individual blocks are successfully validated using postextraction process corner simulations and through real ECG test signals taken from the PhysioNet database. The capacitive feedback amplifier, Σ∆ ADC, AGC and the AFT are fabricated, and the measurement results are discussed here. The analog classification scheme is successfully validated using embed NXP LPC1768 board, discrete peak detector prototype and FPGA software interfac