A Simplified 8 × 8 Transformation And Quantization Real-Time Ip-Block For MPEG-4 H.264/AVC Applications: A New Design Flow Approach

Current multimedia design processes suffer from the excessively large time spent on testing new IP-blocks with references based on large video encoders specifications (usually several thousands lines of code). The appropriate testing of a single IP-block may require the conversion of the overall encoder from software to hardware, which is difficult to complete in the short time required by the competition-driven reduced time-to-market demanded for the adoption of a new video coding standard. This paper presents a new design flow to accelerate the conformance testing of an IP-block using the H.264/AVC software reference model. An example block of the simplified 8 × 8 transformation and quantization, which is adopted in FRExt, is provided as a case study demonstrating the effectiveness of the approach

Real-time motion detection by lateral inhibition in accumulative computation.

Many researchers have explored the relationship between recurrent neural networks and finite state machines. Finite state machines constitute the best characterized computational model, whereas artificial neural networks have become a very successful tool for modeling and problem solving. In the few last years, the neurally inspired lateral inhibition in accumulative computation (LIAC) method and its application to the motion detection task have been introduced. The article shows how to implement the tasks directly related to LIAC in motion detection by means of a formal model described as finite state machines. This paper introduces two steps towards that direction: (a) A simplification of the general LIAC method is performed by formally transforming it into a finite state machine. (b) A hardware implementation of such a designed LIAC module, as well as an 8×8 LIAC module, has been tested on several video sequences, providing promising performance results