A novel self-routing scheme for all-optical packet switched networks with arbitrary topology

Due to limited available photonic devices, optical networks in the near future will likely employ routing schemes that do not require sophisticated processing of optical packets. In this paper, we propose a novel self-routing scheme for all-optical packet networks that can be applied to networks with arbitrary topology. The proposed routing scheme requires only single bit processing and can be implemented with existing technologies.published_or_final_versio

Optical packet switching over arbitrary physical topologies using the Manhattan street network : an evolutionary approach

Published in "Towards an Optical Internet", A. Jukan (Ed.). Optical packet switching over arbitrary physical topologies typically mandates complex routing schemes and the use of buffers to resolve the likely contentions. However, the relatively immature nature of optical logic devices and the limitations with optical buffering provide significant incentive to reduce the routing complexity and avoid optical domain contentions. This paper examines how the Manhattan Street Network (MSN) and a particular routing scheme may be used to facilitate optical packet switching over arbitrary physical topologies. A novel approach, genetic algorithms (GA), is applied to the problem of deploying the MSN (near) optimally in arbitrary physical topologies. A problem encoding is proposed and different implementations of GA described. The optimum GA parameters are empirically selected and GA is successfully used to deploy the MSN in physical topologies of up to 100 nodes. Favourable results are obtained. GA are also seen to out-perform other heuristics at deploying the MSN in arbitrary physical topologies for optical packet switching

A novel self-routing address scheme for all-optical packet-switched networks with arbitrary topologies

Pure all-optical packet-switched networks in which both header processing and packet routing are carried out in the optical domain overcome the bandwidth bottlenecks of optoelectronic conversions and therefore are expected to meet the needs of next generation high speed networks. Due to the limited capabilities of available optical logic devices, realizations of pure all-optical packet-switched networks in the near future will likely employ routing schemes that minimize the complexity of routing control. In this paper, we propose a novel self-routing scheme that identifies the output ports of the nodes in a network instead of the nodes themselves. The proposed address scheme requires single bit processing only and is applicable to small to medium size pure all-optical packet-switched networks with arbitrary topologies. Unlike traditional self-routing schemes, multiple paths between two nodes can be defined. Hierarchical address structure can be used in the proposed routing scheme to shorten the address.published_or_final_versio

Cycle-accurate evaluation of reconfigurable photonic networks-on-chip

There is little doubt that the most important limiting factors of the performance of next-generation Chip Multiprocessors (CMPs) will be the power efficiency and the available communication speed between cores. Photonic Networks-on-Chip (NoCs) have been suggested as a viable route to relieve the off- and on-chip interconnection bottleneck. Low-loss integrated optical waveguides can transport very high-speed data signals over longer distances as compared to on-chip electrical signaling. In addition, with the development of silicon microrings, photonic switches can be integrated to route signals in a data-transparent way. Although several photonic NoC proposals exist, their use is often limited to the communication of large data messages due to a relatively long set-up time of the photonic channels. In this work, we evaluate a reconfigurable photonic NoC in which the topology is adapted automatically (on a microsecond scale) to the evolving traffic situation by use of silicon microrings. To evaluate this system's performance, the proposed architecture has been implemented in a detailed full-system cycle-accurate simulator which is capable of generating realistic workloads and traffic patterns. In addition, a model was developed to estimate the power consumption of the full interconnection network which was compared with other photonic and electrical NoC solutions. We find that our proposed network architecture significantly lowers the average memory access latency (35% reduction) while only generating a modest increase in power consumption (20%), compared to a conventional concentrated mesh electrical signaling approach. When comparing our solution to high-speed circuit-switched photonic NoCs, long photonic channel set-up times can be tolerated which makes our approach directly applicable to current shared-memory CMPs

Deflection routing in slotted self-routing networks with arbitrary topology

A deflection routing algorithm that can be applied to a novel self-routing address scheme for networks with arbitrary topology is proposed. The proposed deflection routing algorithm can be implemented all-optically using bitwise optical logic gates. Besides the primary output link selection, alternate output link choices by a packet at each node in case of deflection are also encoded in the address header. Priority classes can also be defined in the proposed address scheme. The performance of the deflection routing algorithm is studied using the AT&T North America OC-48 optical fiber network topology.published_or_final_versio

Vertex-linked infrastructure for ad hoc networks

An ad hoc network is composed of geographically dispersed nodes that may move arbitrarily and communicate with each other without the support of a stationary infrastructure. Compared with a wireless network with a stationary infrastructure, such as a cellular network, an ad hoc network is inherently less efficient. Therefore, a number of proposals have been made to develop a quasi-stationary infrastructure for ad hoc networks. However, the dynamic nature of ad hoc networks makes it very costly to maintain such an infrastructure. This article proposes a Vertex-Linked Infrastructure (VLI) for ad hoc networks. This novel approach uses an easily deployable, survivable, wired infrastructure as a backbone of the ad hoc network, thus realizing the advantages of an infrastructure in wireless communications, but without the overhead due to maintaining such an infrastructure.published_or_final_versio

Hybrid Optoelectronic Router for Future Optical Packet‐ Switched Networks

With the growing demand for bandwidth and the need to support new services, several challenges are awaiting future photonic networks. In particular, the performance of current network nodes dominated by electrical routers/switches is seen as a bottleneck that is accentuated by the pressing demand for reducing the network power consumption. With the concept of performing more node functions with optics/optoelectronics, optical packet switching (OPS) provides a promising solution. We have developed a hybrid optoelectronic router (HOPR) prototype that exhibits low power consumption and low latency together with high functionality. The router is enabled by key optical/optoelectronic devices and subsystem technologies that are combined with CMOS electronics in a novel architecture to leverage the strengths of both optics/optoelectronics and electronics. In this chapter, we review our recent HOPR prototype developed for realizing a new photonic intra data center (DC) network. After briefly explaining about the HOPR‐based DC network, we highlight the underlying technologies of the new prototype that enables label processing, switching, and buffering of asynchronous arbitrary‐length 100‐Gbps (25‐Gbps × 4λs) burst‐mode optical packets with enhanced power efficiency and reduced latency