Validation by Measurements of a IC Modeling Approach for SiP Applications

The growing importance of signal integrity (SI) analysis in integrated circuits (ICs), revealed by modern systemin-package methods, is demanding for new models for the IC sub-systems which are both accurate, efficient and extractable by simple measurement procedures. This paper presents the contribution for the establishment of an integrated IC modeling approach whose performance is assessed by direct comparison with the signals measured in laboratory of two distinct memory IC devices. Based on the identification of the main blocks of a typical IC device, the modeling approach consists of a network of system-level sub-models, some of which with already demonstrated accuracy, which simulated the IC interfacing behavior. Emphasis is given to the procedures that were developed to validate by means of laboratory measurements (and not by comparison with circuit-level simulations) the model performance, which is a novel and important aspect that should be considered in the design of IC models that are useful for SI analysi

Next Generation Silicon Photonic Transceiver: From Device Innovation to System Analysis

Silicon photonics is recognized as a disruptive technology that has the potential to reshape many application areas, for example, data center communication, telecommunications, high-performance computing, and sensing. The key capability that silicon photonics offers is to leverage CMOS-style design, fabrication, and test infrastructure to build compact, energy-efficient, and high-performance integrated photonic systems-on- chip at low cost. As the need to squeeze more data into a given bandwidth and a given footprint increases, silicon photonics becomes more and more promising. This work develops and demonstrates novel devices, methodologies, and architectures to resolve the challenges facing the next-generation silicon photonic transceivers. The first part of this thesis focuses on the topology optimization of passive silicon photonic devices. Specifically, a novel device optimization methodology - particle swarm optimization in conjunction with 3D finite-difference time-domain (FDTD), has been proposed and proven to be an effective way to design a wide range of passive silicon photonic devices. We demonstrate a polarization rotator and a 90◦ optical hybrid for polarization-diversity and phase-diversity communications - two important schemes to increase the communication capacity by increasing the spectral efficiency. The second part of this thesis focuses on the design and characterization of the next- generation silicon photonic transceivers. We demonstrate a polarization-insensitive WDM receiver with an aggregate data rate of 160 Gb/s. This receiver adopts a novel architecture which effectively reduces the polarization-dependent loss. In addition, we demonstrate a III-V/silicon hybrid external cavity laser with a tuning range larger than 60 nm in the C-band on a silicon-on-insulator platform. A III-V semiconductor gain chip is hybridized into the silicon chip by edge-coupling to the silicon chip. The demonstrated packaging method requires only passive alignment and is thus suitable for high-volume production. We also demonstrate all silicon-photonics-based transmission of 34 Gbaud (272 Gb/s) dual-polarization 16-QAM using our integrated laser and silicon photonic coherent transceiver. The results show no additional penalty compared to commercially available narrow linewidth tunable lasers. The last part of this thesis focuses on the chip-scale optical interconnect and presents two different types of reconfigurable memory interconnects for multi-core many-memory computing systems. These reconfigurable interconnects can effectively alleviate the memory access issues, such as non-uniform memory access, and Network-on-Chip (NoC) hot-spots that plague the many-memory computing systems by dynamically directing the available memory bandwidth to the required memory interface

Concepts for Short Range Millimeter-wave Miniaturized Radar Systems with Built-in Self-Test

This work explores short-range millimeter wave radar systems, with emphasis on miniaturization and overall system cost reduction. The designing and implementation processes, starting from the system level design considerations and characterization of the individual components to final implementation of the proposed architecture are described briefly. Several D-band radar systems are developed and their functionality and performances are demonstrated

Signal and Power Integrity Challenges for High Density System-on-Package

As the increasing desire for more compact, portable devices outpaces Moore’s law, innovation in packaging and system design has played a significant role in the continued miniaturization of electronic systems.Integrating more active and passive components into the package itself, as the case for system-on-package (SoP), has shown very promising results in overall size reduction and increased performance of electronic systems.With this ability to shrink electrical systems comes the many challenges of sustaining, let alone improving, reliability and performance. The fundamental signal, power, and thermal integrity issues are discussed in detail, along with published techniques from around the industry to mitigate these issues in SoP applications

Enabling Solutions for Integration and Interconnectivity in Millimeter-wave and Terahertz Systems

Recently, Terahertz (THz) systems have witnessed increasing attention due to the continuous need for high data rate transmission which is mainly driven by next-generation telecommunication and imaging systems. In that regard, the THz range emerged as a potential domain suitable for realizing such systems by providing a wide bandwidth capable of achieving and meeting the market requirements. However, the realization of such systems faces many challenges, one of which is interconnectivity and high level of integration. Conventional packaging techniques would not be suitable from performance perspective above 100 GHz and new approaches need to be developed. This thesis proposes and demonstrates several approaches to implement interconnects that operate above 100 GHz. One of the most attractive techniques discussed in this work is to implement on-chip coupling structures and insert the monolithic microwave integrated circuit (MMIC) directly into a waveguide (WG). Such approach provides high level of integration and eliminates the need of galvanic contacts; however, it suffers from a major drawback which isthe propagation of parasitic modes in the circuit cavity if the MMIC is large enough to allow such modes to propagate. To mitigate this problem, this work suggests and investigates the use of electromagnetic bandgap (EBG) structures that suppresses those modes such as bed of nails and mushroom-type EBG structures. The proposed techniques are used to implement several on-chip packaging solutions that have an insertion loss as low as 0.6 dB at D-band (110-170 GHz). Moreover, the solutions are demonstrated in several active systems using various commercial MMIC technologies. The thesis also investigates the possibility of utilizing the commercially available packaging technologies such as Embedded Wafer Level Ball Grid Array (eWLB) packaging. Such technology has been widely used for integrated circuits operating below 100 GHz but was not attempted in the THz range before. This work attempts to push the limits of the technology and proposes novel solutions based on coupling structures implemented in the technology’s redistribution layers. The proposed solutions achieve reasonable performance at D-band that are suitable for low-cost mass production while allowing heterogeneous integration with other technologies as well. This work addresses integration challenges facing systems operating in the THz range and proposes high-performance interconnectivity solutions demonstrated in a wide range of commercial technologies and hence enables such systems to reach their full potential and meet the increasing market demands

Study of the impact of lithography techniques and the current fabrication processes on the design rules of tridimensional fabrication technologies

Working for the photolithography tool manufacturer leader sometimes gives me the impression of how complex and specific is the sector I am working on. This master thesis topic came with the goal of getting the overall picture of the state-of-the-art: stepping out and trying to get a helicopter view usually helps to understand where a process is in the productive chain, or what other firms and markets are doing to continue improvingUniversidad de sevilla.Máster Universitario en Microelectrónica: Diseño y Aplicaciones de Sistemas Micro/Nanométrico