4 research outputs found
Fully Synthesizable, Rail-to-Rail Dynamic Voltage Comparator for Operation down to 0.3V
A novel rail-to-rail dynamic voltage comparator is presented in this paper. The proposed circuit is fully synthesizable, as it can be designed with automated digital design flows and standard cells, and can operate at very low voltages down to deep sub-threshold. Post-layout simulations show correct operation for rail-to-rail common-mode inputs at a supply voltage VDD down to 0.3 V. At such voltage, the input offset voltage standard deviation is less than 28 mV (8 mV) over the rail-to-rail common-mode input range (around VDD/2). The digital nature of the comparator and its ability to operate down to deep sub-threshold voltages allow its full integration with standard-cell digital circuits in terms of both design and voltage domain. The ease of design, the low area and the voltage scalability make the proposed comparator very well suited for sensor nodes, integrated circuits for the Internet of Things and related applications
Multi-antenna based one-bit spatio-temporal wideband sensing for cognitive radio networks
Cognitive Radio (CR) communication has been considered as one of the promising technologies to enable dynamic spectrum sharing in the next generation of wireless networks. Among several possible enabling techniques, Spectrum Sensing (SS) is one of the key aspects for enabling opportunistic spectrum access in CR Networks (CRN). From practical perspectives, it is important to design low-complexity wideband CR receiver having low resolution Analog to Digital Converter (ADC) working at a reasonable sampling rate. In this context, this paper proposes a novel spatio-temporal wideband SS technique by employing multiple antennas and one-bit quantization at the CR node, which subsequently enables the use of a reasonable sampling rate. In our analysis, we show that for the same sensing performance requirements, the proposed wideband receiver can have lower power consumption than the conventional CR receiver equipped with a single-antenna and a high-resolution ADC. Furthermore, the proposed technique exploits the spatial dimension by estimating the direction of arrival of Primary User (PU) signals, which is not possible by the conventional SS methods and can be of a significant benefit in a CRN. Moreover, we evaluate the performance of the proposed technique and analyze the effects of one-bit quantization with the help of numerical results
BPLight-CNN: A Photonics-based Backpropagation Accelerator for Deep Learning
Training deep learning networks involves continuous weight updates across the
various layers of the deep network while using a backpropagation algorithm
(BP). This results in expensive computation overheads during training.
Consequently, most deep learning accelerators today employ pre-trained weights
and focus only on improving the design of the inference phase. The recent trend
is to build a complete deep learning accelerator by incorporating the training
module. Such efforts require an ultra-fast chip architecture for executing the
BP algorithm. In this article, we propose a novel photonics-based
backpropagation accelerator for high performance deep learning training. We
present the design for a convolutional neural network, BPLight-CNN, which
incorporates the silicon photonics-based backpropagation accelerator.
BPLight-CNN is a first-of-its-kind photonic and memristor-based CNN
architecture for end-to-end training and prediction. We evaluate BPLight-CNN
using a photonic CAD framework (IPKISS) on deep learning benchmark models
including LeNet and VGG-Net. The proposed design achieves (i) at least 34x
speedup, 34x improvement in computational efficiency, and 38.5x energy savings,
during training; and (ii) 29x speedup, 31x improvement in computational
efficiency, and 38.7x improvement in energy savings, during inference compared
to the state-of-the-art designs. All these comparisons are done at a 16-bit
resolution; and BPLight-CNN achieves these improvements at a cost of
approximately 6% lower accuracy compared to the state-of-the-art