Transmitter architectures with digital modulators, D/A converters and switching-mode power amplifiers

This thesis is composed of nine publications and an overview of the research topic, which also summarises the work. The research described in this thesis focuses on research into the digitalisation of wireless communication base station transmitters. In particular it has three foci: digital modulation, D/A conversion and switching-mode power amplification. The main interest in the implementation of these circuits is in CMOS. The work summarizes the designs of several circuit blocks of a wireless transmitter base station. In the baseband stage, a multicarrier digital modulator that combines multiple modulated signals at different carrier frequencies digitally at baseband, and a multimode digital modulator that can be operated for three different communications standards, are implemented as integrated circuits. The digital modulators include digital power ramping and power level control units for transmission bursts. The upconversion of the baseband signal is implemented using an integrated digital quadrature modulator. The work presented provides insight into the digital-to-analogue interface in the transmitters. This interface is studied both by implementing an intermediate frequency D/A converter in BiCMOS technology and bandpass Delta-Sigma modulator-based D/A conversion in CMOS technology. Finally, the last part of the work discusses switching-mode power amplifiers which are experimented with both as discrete and integrated implementations in conjunction with 1-bit Delta-Sigma modulation and pulse-width modulation as input signal generation methods.Tämä väitöskirja koostuu yhdeksästä julkaisusta ja tutkimusaiheen yhteenvedosta. Väitöskirjassa esitetty tutkimus keskittyy langattaman viestinnän tukiasemien lähettimien digitalisoinnin tutkimukseen. Yksityiskohtaisemmin tutkimusalueet ovat: digitaalinen modulaatio, D/A muunnos ja kytkinmuotoiset tehovahvistimet. Näiden elektronisten piirien toteutuksessa keskitytään CMOS teknologiaan. Työ vetää yhteen useiden langattoman viestinnän tukiasemien lähettimien piirilohkojen suunnittelun. Kantataajuusasteella toteutetaan integroituna piirinä monikantoaaltoinen digitaalinen modulaattori, joka yhdistää useita moduloituja signaaleja eri kantoaalloilla digitaalisesti ja monistandardi digitaalinen modulaatori, joka tukee kolmea eri viestintästandardia. Digitaaliset modulaattoripiirit sisältävät digitaalisen tehoramping ja tehotason säätöyksikön lähetyspurskeita varten. Kantataajuussignaalin ylössekoitus toteutetaan integroitua digitaalista kvadratuurimodulaattoria käyttäen. Esitetty työ antaa näkemystä lähettimien digitalia-analogia rajapintaan, jota tutkitaan toteuttamalla välitaajuinen D/A muunnin BiCMOS teknologialla ja päästökaistainen Delta-Sigma-modulaattoripohjainen D/A muunnin CMOS teknologialla. Lopuksi työn viimeinen osa käsittelee kytkinmuotoisia tehovahvistimia, joita tutkitaan kokeellisesti sekä erilliskompontein toteutettuina piirein että integroiduin piirein toteutettuina käyttäen sisääntulosignaalin muodostamismenetemänä yksibittistä Delta-Sigma-modulaatiota ja pulssin leveys modulaatiota.reviewe

Low power data converters for specific applications

Due to increasing importance of portable equipment and reduction of the supply voltage due to technology scaling, recent efforts in the design of mixed-signal circuits have focused on developing new techniques to reduce the power dissipation and supply voltage. This requires research into new architectures and circuit techniques that enable both integration and programmability. Programmability allows each component to be used for different applications, reducing the total number of components, and increased integration by eliminating external components will reduce cost and power;Since data converters are used in many different applications, in this thesis new low voltage and low power data converter techniques at both the architecture and circuit design levels are investigated to minimize power dissipation and supply voltage. To demonstrate the proposed techniques, test the performance of the proposed architectures, and verify their effectiveness in terms of power savings, five prototype chips are fabricated and tested;First, a re-configurable data converter (RDC) architecture is presented that can be programmed as analog-to-digital converter (ADC), digital-to-analog converter (DAC), or both. The reconfigurability of the RDC to different numbers of ADCs and DACs having different speeds and resolutions makes it an ideal choice for analog test bus, mixed-mode boundary scan, and built-in self test applications. It combines the advantages of both analog test buses and boundary scan techniques while the area overhead of the proposed techniques is very low compared to the mixed-mode boundary scan techniques. RDC can save power by allowing the designer to program it as the right converter for desired application. This architecture can be potentially implemented inside a field programmable gate array (FPGA) to allow the FPGA communicate with the analog world. It can also be used as a stand-alone product to give flexibility to the user to choose ADC/DAC combinations for the desired application;Next, a new method for designing low power and small area ROMless direct digital frequency synthesizers (DDFSs) is presented. In this method, a non-linear digital-to-analog converter is used to replace the phase-to-sine amplitude ROM look-up table and the linear DAC in conventional DDFS. Since the non-linear DAC converts the phase information directly into analog sine wave, no phase-to-amplitude ROM look-up table is required;Finally, a new low voltage technique based on biased inverting opamp that can have almost rail-to-rail swing with continuously valid output is discussed. Based on this biasing technique, a 10-bit segmented R-2R DAC and an 8-bit successive approximation ADC are designed and presented

Chapter Development of Josephson voltage standards

Neurology & clinical neurophysiolog

Development of Josephson voltage standards

Neurology & clinical neurophysiolog

Theory, design and implementation of an IF cancellation module for use in a stepped frequency continuous wave ground penetrating radar

Bibliography: leaves 64-68.A device has been designed that cancels the leakage signal between the transmit and receive antenna in a Stepped Frequency Continuous Wave Ground Penetrating Radar. The front end of the radar operates at high signal levels and, as a result, a large signal is coupled directly from the transmit to the receive antenna. This signal uses a signiï¬ cant part of the dynamic range of the data-capturing device, an analogue-to-digital converter (ADC). The objective of this cancellation is thus to increase the effective instantaneous dynamic range of the radar system. Simulations show that 10-bit amplitude and phase resolution in the digital cancellation circuit would achieve maximum cancellation in the presence of phase noise and other sources of error. This result is conï¬ rmed when the hardware is tested. The device was constructed and operates as intended. Tests show that cancellation exceeding 53dBm is possible through careful calibration. It was concluded that the device could successfully be integrated into the SFCW GPR and that it would achieve an increase in the instantaneous dynamic range

Development of a real-time full-field range imaging system

This article describes the development of a full-field range imaging system employing a high frequency amplitude modulated light source and image sensor. Depth images are produced at video frame rates in which each pixel in the image represents distance from the sensor to objects in the scene. The various hardware subsystems are described as are the details about the firmware and software implementation for processing the images in real-time. The system is flexible in that precision can be traded off for decreased acquisition time. Results are reported to illustrate this versatility for both high-speed (reduced precision) and high-precision operating modes

Development and evaluation of a programmable radio frequency signal

ThesisMost commercially available signal generators make use of a phase-locked loop in combination with analogue frequency synthesis to generate the desired frequency range. Advances in the development of components being used in digital frequency synthesis have made the use of direct digital synthesis (DDS) a viable option in radio frequency (RF) signal generation. The project consists of designing the interfacing between a DDS unit and a microcontroller to provide a versatile frequency generator in the lower high frequency (HF) spectrum. The research was aimed at testing the following hypothesis: A programmable Radio Frequency signal generator can be developed, using a DDS-based system with a microcontroller providing the required intelligence. A continuously variable frequency range in 1 Hz steps over a spectrum of 0- 10 MHz can be achieved. The following features were included in the design of the signal generator: • Setting the generator to a specific frequency; • Displaying the frequency and prompts from the microcontroller on a liquid crystal display; • Interfacing with a keypad; • Interfacing with a personal computer for remote RS232 operation; • Interfacing with a rotary optical encoder for up-and-down frequency control; • Sweeping of a range of frequencies; • Setting the step size of frequency increments; • Frequency shift keying (FSK) capability. The above features allowed ample demonstration of the software control over the associated hardware and enabled easy evaluation of the product. To evaluate the product, it was decided to concentrate on the following measurable aspects of a typical radio frequency (RF) signal generator: • The accuracy of the output frequency; • Evaluating the frequency range limits of the generator; • Making a spectral analysis of the output signal. During the execution of the project, insight was gained with respect to the following: • DDS theory; • DDS hardware interfacing; • C-programming as well as using the versatile DSSOOO microcontroller; • The importance of sound design principles in a hybrid digital and analogue radio frequency project. • Setting the step size of frequency increments; • Frequency shift keying (FSK) capability. The above features allowed ample demonstration of the software control over the associated hardware and enabled easy evaluation of the product. To evaluate the product, it was decided to concentrate on the following measurable aspects of a typical radio frequency (RF) signal generator: • The accuracy of the output frequency; • Evaluating the frequency range limits of the generator; • Making a spectral analysis of the output signal. During the execution of the project, insight was gained with respect to the following: • DDS theory; • DDS hardware interfacing; • C-programming as well as using the versatile DSSOOO microcontroller; • The importance of sound design principles in a hybrid digital and analogue radio frequency project

A VHDL-AMS Modeling Methodology for Top-Down/Bottom-Up Design of RF Systems

Indo-ChinaAn agreement between Ho Chi Minh and the French (1946) made Vietnam a free state though fighting between parties erupted into the First Indochina War ending in May 1954.Vietnam. (2013). In Encyclopædia Britannica. Retrieved from http://school.eb.com/eb/article-52744GrayscaleForman Safety Negatives, Box

Design and implementation of analog modular sythesizer for teaching and learning signal processing

Capstone Project submitted to the Department of Engineering, Ashesi University in partial fulfillment of the requirements for the award of Bachelor of Science degree in Electrical and Electronic Engineering, May 2021Signal processing has proven useful over the past decades. Major advancements in technology owes much to signal processing. However, the courses that deal with signal processing concepts have not been much appreciated due to their complexity and difficulty understanding. This project seeks to use an implemented and fabricated design of the analog modular synthesizer to illustrate modulation and filtering concepts in signal processing.Ashesi Universit

Design of a low-cost high speed data capture card for the Hubble Sphere Hydrogen Survey

Includes bibliographical references (leaves 101-105).This thesis describes the design and implementation of a low-cost high speed data capture card for the Hubble Sphere Hydrogen Survey (HSHS). The Hubble Space Hydrogen Survey was initiated in an effort to build a low-cost cylindrical radio telescope for an all sky redshift survey with the observational goal to produce a 3-dimensional mapping of the bulk Hubble Sphere using Hydrogen 21cm emissions. This dissertation ï¬ rst investigates the system design to see how each of the user speciï¬ cations set by the planning team could be achieved in terms of design decisions, component selection and schematic capture. The final design. AstroGIG, satisï¬ es the user speciï¬ cations by capturing data up to a full power bandwidth of 1.7GHz with an instantaneous bandwidth of ≤ 250MHz white maximizing the dynamic range. AstroGIG buffers, processes, stores and ï¬ nally transmits the data through a 4-lane PCI-Express interface to a standard PC where the majority of the processing is performed. The system implementation is then described where issues relating to the process of transforming schematics into a physical PCB, and HSHS integration are discussed. The design is veriï¬ ed through Hyperlynx simulations to give a high degree of certainty that physical implementation and production would be successful. Results from tests on the actual hardware characterizing the overall system performance are presented. Conclusions are drawn based on these results and suggestions for future work and design improvements are recommended