9,781 research outputs found
Technical Design Report for the PANDA Micro Vertex Detector
This document illustrates the technical layout and the expected performance of the Micro Vertex Detector (MVD) of the PANDA experiment. The MVD will detect charged particles as close as possible to the interaction zone. Design criteria and the optimisation process as well as the technical solutions chosen are discussed and the results of this process are subjected to extensive Monte Carlo physics studies. The route towards realisation of the detector is
outlined
Modeling the Temperature Bias of Power Consumption for Nanometer-Scale CPUs in Application Processors
We introduce and experimentally validate a new macro-level model of the CPU
temperature/power relationship within nanometer-scale application processors or
system-on-chips. By adopting a holistic view, this model is able to take into
account many of the physical effects that occur within such systems. Together
with two algorithms described in the paper, our results can be used, for
instance by engineers designing power or thermal management units, to cancel
the temperature-induced bias on power measurements. This will help them gather
temperature-neutral power data while running multiple instance of their
benchmarks. Also power requirements and system failure rates can be decreased
by controlling the CPU's thermal behavior.
Even though it is usually assumed that the temperature/power relationship is
exponentially related, there is however a lack of publicly available physical
temperature/power measurements to back up this assumption, something our paper
corrects. Via measurements on two pertinent platforms sporting nanometer-scale
application processors, we show that the power/temperature relationship is
indeed very likely exponential over a 20{\deg}C to 85{\deg}C temperature range.
Our data suggest that, for application processors operating between 20{\deg}C
and 50{\deg}C, a quadratic model is still accurate and a linear approximation
is acceptable.Comment: Submitted to SAMOS 2014; International Conference on Embedded
Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV
Hybrid Gate-Level Leakage Model for Monte Carlo Analysis on Multiple GPUs
This paper proposes a hybrid gate-level leakage model for the use with the Monte Carlo (MC) analysis approach, which combines a lookup table (LUT) model with a first-order exponential-polynomial model (first-order model, herein). For the process parameters having strong nonlinear relationships with the logarithm of leakage current, the proposed model uses the LUT approach for the sake of modeling accuracy. For the other process parameters, it uses the first-order model for increased efficiency. During the library characterization for each type of logic gates, the proposed approach determines the process parameters for which it will use the LUT model. And, it determines the number of LUT data points, which can maximize analysis efficiency with acceptable accuracy, based on the user-defined threshold. The proposed model was implemented for gate-level MC leakage analysis using three graphic processing units. In experiments, the proposed approach exhibited the average errors of <5% in both mean and standard deviation with reference to SPICE-level MC leakage analysis. In comparison, MC analysis with the first-order model exhibited more than 90% errors. In CPU times, the proposed hybrid approach took only two to five times longer runtimes. In comparison with the full LUT model, the proposed hybrid model was up to one hundred times faster while increasing the average errors by only 3%. Finally, the proposed approach completed a leakage analysis of an OpenSparc T2 core of 4.5 million gates with a runtime of <5 min.1150Ysciescopu
Recommended from our members
TAO Conceptual Design Report: A Precision Measurement of the Reactor Antineutrino Spectrum with Sub-percent Energy Resolution
The Taishan Antineutrino Observatory (TAO, also known as JUNO-TAO) is a
satellite experiment of the Jiangmen Underground Neutrino Observatory (JUNO). A
ton-level liquid scintillator detector will be placed at about 30 m from a core
of the Taishan Nuclear Power Plant. The reactor antineutrino spectrum will be
measured with sub-percent energy resolution, to provide a reference spectrum
for future reactor neutrino experiments, and to provide a benchmark measurement
to test nuclear databases. A spherical acrylic vessel containing 2.8 ton
gadolinium-doped liquid scintillator will be viewed by 10 m^2 Silicon
Photomultipliers (SiPMs) of >50% photon detection efficiency with almost full
coverage. The photoelectron yield is about 4500 per MeV, an order higher than
any existing large-scale liquid scintillator detectors. The detector operates
at -50 degree C to lower the dark noise of SiPMs to an acceptable level. The
detector will measure about 2000 reactor antineutrinos per day, and is designed
to be well shielded from cosmogenic backgrounds and ambient radioactivities to
have about 10% background-to-signal ratio. The experiment is expected to start
operation in 2022
On Timing Model Extraction and Hierarchical Statistical Timing Analysis
In this paper, we investigate the challenges to apply Statistical Static
Timing Analysis (SSTA) in hierarchical design flow, where modules supplied by
IP vendors are used to hide design details for IP protection and to reduce the
complexity of design and verification. For the three basic circuit types,
combinational, flip-flop-based and latch-controlled, we propose methods to
extract timing models which contain interfacing as well as compressed internal
constraints. Using these compact timing models the runtime of full-chip timing
analysis can be reduced, while circuit details from IP vendors are not exposed.
We also propose a method to reconstruct the correlation between modules during
full-chip timing analysis. This correlation can not be incorporated into timing
models because it depends on the layout of the corresponding modules in the
chip. In addition, we investigate how to apply the extracted timing models with
the reconstructed correlation to evaluate the performance of the complete
design. Experiments demonstrate that using the extracted timing models and
reconstructed correlation full-chip timing analysis can be several times faster
than applying the flattened circuit directly, while the accuracy of statistical
timing analysis is still well maintained
Experimental Tests of Particle Flow Calorimetry
Precision physics at future colliders requires highly granular calorimeters
to support the Particle Flow Approach for event reconstruction. This article
presents a review of about 10 - 15 years of R\&D, mainly conducted within the
CALICE collaboration, for this novel type of detector. The performance of large
scale prototypes in beam tests validate the technical concept of particle flow
calorimeters. The comparison of test beam data with simulation, of e.g.\
hadronic showers, supports full detector studies and gives deeper insight into
the structure of hadronic cascades than was possible previously.Comment: 55 pages, 83 figures, to appear in Reviews of Modern physic
- âŠ