715 research outputs found

    Virtual Communication Stack: Towards Building Integrated Simulator of Mobile Ad Hoc Network-based Infrastructure for Disaster Response Scenarios

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    Responses to disastrous events are a challenging problem, because of possible damages on communication infrastructures. For instance, after a natural disaster, infrastructures might be entirely destroyed. Different network paradigms were proposed in the literature in order to deploy adhoc network, and allow dealing with the lack of communications. However, all these solutions focus only on the performance of the network itself, without taking into account the specificities and heterogeneity of the components which use it. This comes from the difficulty to integrate models with different levels of abstraction. Consequently, verification and validation of adhoc protocols cannot guarantee that the different systems will work as expected in operational conditions. However, the DEVS theory provides some mechanisms to allow integration of models with different natures. This paper proposes an integrated simulation architecture based on DEVS which improves the accuracy of ad hoc infrastructure simulators in the case of disaster response scenarios.Comment: Preprint. Unpublishe

    Hybrid Multiresolution Simulation & Model Checking: Network-On-Chip Systems

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    abstract: Designers employ a variety of modeling theories and methodologies to create functional models of discrete network systems. These dynamical models are evaluated using verification and validation techniques throughout incremental design stages. Models created for these systems should directly represent their growing complexity with respect to composition and heterogeneity. Similar to software engineering practices, incremental model design is required for complex system design. As a result, models at early increments are significantly simpler relative to real systems. While experimenting (verification or validation) on models at early increments are computationally less demanding, the results of these experiments are less trustworthy and less rewarding. At any increment of design, a set of tools and technique are required for controlling the complexity of models and experimentation. A complex system such as Network-on-Chip (NoC) may benefit from incremental design stages. Current design methods for NoC rely on multiple models developed using various modeling frameworks. It is useful to develop frameworks that can formalize the relationships among these models. Fine-grain models are derived using their coarse-grain counterparts. Moreover, validation and verification capability at various design stages enabled through disciplined model conversion is very beneficial. In this research, Multiresolution Modeling (MRM) is used for system level design of NoC. MRM aids in creating a family of models at different levels of scale and complexity with well-formed relationships. In addition, a variant of the Discrete Event System Specification (DEVS) formalism is proposed which supports model checking. Hierarchical models of Network-on-Chip components may be created at different resolutions while each model can be validated using discrete-event simulation and verified via state exploration. System property expressions are defined in the DEVS language and developed as Transducers which can be applied seamlessly for model checking and simulation purposes. Multiresolution Modeling with verification and validation capabilities of this framework complement one another. MRM manages the scale and complexity of models which in turn can reduces V&V time and effort and conversely the V&V helps ensure correctness of models at multiple resolutions. This framework is realized through extending the DEVS-Suite simulator and its applicability demonstrated for exemplar NoC models.Dissertation/ThesisDoctoral Dissertation Computer Science 201

    Verification and Validation of D2FD Method

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    International audience—D2FD (Data to Fuzzy-DEVS) method provides a solution for the problem of system inference. This method is well designed and implemented as an available and dedicated plug-in within the process mining framework (ProM). This plug-in is also integrated with the simulation tool SimStudio. However, the last step of the process of inferring models and simulations, which is verification and validation, is missing. This paper proposes a new paradigm of verification and validation in system inference. The case study uses the method of comparing with other models as the main validation technique. Based on the same data source from the Dutch Employee Insurance Agency, it attempts to compare the previous results with other studies

    Learning and testing stochastic discrete event

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    Dissertação de mestrado em Engenharia de InformáticaSistemas de eventos discretos (DES) são uma importante subclasse de sistemas (à luz da teoria dos sistemas). Estes têm sido usados, particularmente na indústria para analisar e modelar um vasto conjunto de sistemas reais, tais como, sistemas de produção, sistemas de computador, sistemas de controlo de tráfego e sistemas híbridos. O nosso trabalho explora uma extensão de DES com ênfase nos processos estocásticos, comummente chamado como sistemas de eventos discretos estocásticos (SDES). Existe assim a necessidade de estabelecer uma abstração estocástica através do uso de processos semi-Markovianos generalizados (GSMP) para SDES. Assim, o objetivo do nosso trabalho é propor uma metodologia e um conjunto de algoritmos para aprendizagem de GSMP, usar técnicas de model-checking estatístico para a verificação e propor duas novas abordagens para teste de DES e SDES (respetivamente, não estocasticamente e estocasticamente). Este trabalho também introduz uma noção de modelação, analise e verificação de sistemas contínuos e modelos de perturbação no contexto da verificação por model-checking estatístico.Discrete event systems (DES) are an important subclass of systems (in systems theory). They have been used, particularly in industry, to analyze and model a wide variety of real systems, such as production systems, computer systems, traffic systems, and hybrid systems. Our work explores an extension of DES with an emphasis on stochastic processes, commonly called stochastic discrete event systems (SDES). There was a need to establish a stochastic abstraction for SDES through generalized semi-Markov processes (GSMP). Thus, the aim of our work is to propose a methodology and a set of algorithms for GSMP learning, using model checking techniques for verification, and to propose two new approaches for testing DES and SDES (non-stochastically and stochastically). This work also introduces a notion of modeling, analysis, and verification of continuous systems and disturbance models in the context of verifiable statistical model checking

    Simulation of a Clustering Scheme for Vehicular Ad Hoc Networks Using a DEVS-based Virtual Laboratory Environment

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    ANT 2018, The 9th International Conference on Ambient Systems, Networks and Technologies, Porto, PORTUGAL, 08-/05/2018 - 11/05/2018Protocol design is usually based on the functional models developed according to the needs of the system. In Intelligent Transport Systems (ITS), the features studied regarding Vehicular Ad hoc Networks (VANET) include self-organizing, routing, reliability, quality of service, and security. Simulation studies on ITS-dedicated routing protocols usually focus on their performance in specific scenarios. However, the evolution of transportation systems towards autonomous vehicles requires robust protocols with proven or at least guaranteed properties. Though formal approaches provide powerful tools for system design, they cannot be used for every types of ITS components. Our goal is to develop new tools combining formal tools such as Event-B with DEVS-based (Discrete Event System Specification) virtual laboratories in order to design the models of ITS components which simulation would allow proving and verifying their properties in large-scale scenarios. This paper presents the models of the different components of a VANET realized with the Virtual Laboratory Environment (VLE). We point out the component models fitting to formal modeling, and proceed to the validation of all designed models through a simulation scenario based on real-world road traffic data

    Multi-level agent-based modeling - A literature survey

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    During last decade, multi-level agent-based modeling has received significant and dramatically increasing interest. In this article we present a comprehensive and structured review of literature on the subject. We present the main theoretical contributions and application domains of this concept, with an emphasis on social, flow, biological and biomedical models.Comment: v2. Ref 102 added. v3-4 Many refs and text added v5-6 bibliographic statistics updated. v7 Change of the name of the paper to reflect what it became, many refs and text added, bibliographic statistics update

    A Framework for Executable Systems Modeling

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    Systems Modeling Language (SysML), like its parent language, the Unified Modeling Language (UML), consists of a number of independently derived model languages (i.e. state charts, activity models etc.) which have been co-opted into a single modeling framework. This, together with the lack of an overarching meta-model that supports uniform semantics across the various diagram types, has resulted in a large unwieldy and informal language schema. Additionally, SysML does not offer a built in framework for managing time and the scheduling of time based events in a simulation. In response to these challenges, a number of auxiliary standards have been offered by the Object Management Group (OMG); most pertinent here are the foundational UML subset (fUML), Action language for fUML (Alf), and the UML profile for Modeling and Analysis of Real Time and Embedded Systems (MARTE). However, there remains a lack of a similar treatment of SysML tailored towards precise and formal modeling in the systems engineering domain. This work addresses this gap by offering refined semantics for SysML akin to fUML and MARTE standards, aimed at primarily supporting the development of time based simulation models typically applied for model verification and validation in systems engineering. The result of this work offers an Executable Systems Modeling Language (ESysML) and a prototype modeling tool that serves as an implementation test bed for the ESysML language. Additionally a model development process is offered to guide user appropriation of the provided framework for model building
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