An Optoelectronic Stimulator for Retinal Prosthesis

Retinal prostheses require the presence of viable population of cells in the inner retina. Evaluations of retina with Age-Related Macular Degeneration (AMD) and Retinitis Pigmentosa (RP) have shown a large number of cells remain in the inner retina compared with the outer retina. Therefore, vision loss caused by AMD and RP is potentially treatable with retinal prostheses. Photostimulation based retinal prostheses have shown many advantages compared with retinal implants. In contrary to electrode based stimulation, light does not require mechanical contact. Therefore, the system can be completely external and not does have the power and degradation problems of implanted devices. In addition, the stimulating point is flexible and does not require a prior decision on the stimulation location. Furthermore, a beam of light can be projected on tissue with both temporal and spatial precision. This thesis aims at fi nding a feasible solution to such a system. Firstly, a prototype of an optoelectronic stimulator was proposed and implemented by using the Xilinx Virtex-4 FPGA evaluation board. The platform was used to demonstrate the possibility of photostimulation of the photosensitized neurons. Meanwhile, with the aim of developing a portable retinal prosthesis, a system on chip (SoC) architecture was proposed and a wide tuning range sinusoidal voltage-controlled oscillator (VCO) which is the pivotal component of the system was designed. The VCO is based on a new designed Complementary Metal Oxide Semiconductor (CMOS) Operational Transconductance Ampli er (OTA) which achieves a good linearity over a wide tuning range. Both the OTA and the VCO were fabricated in the AMS 0.35 µm CMOS process. Finally a 9X9 CMOS image sensor with spiking pixels was designed. Each pixel acts as an independent oscillator whose frequency is controlled by the incident light intensity. The sensor was fabricated in the AMS 0.35 µm CMOS Opto Process. Experimental validation and measured results are provided

Ono: an open platform for social robotics

In recent times, the focal point of research in robotics has shifted from industrial ro- bots toward robots that interact with humans in an intuitive and safe manner. This evolution has resulted in the subfield of social robotics, which pertains to robots that function in a human environment and that can communicate with humans in an int- uitive way, e.g. with facial expressions. Social robots have the potential to impact many different aspects of our lives, but one particularly promising application is the use of robots in therapy, such as the treatment of children with autism. Unfortunately, many of the existing social robots are neither suited for practical use in therapy nor for large scale studies, mainly because they are expensive, one-of-a-kind robots that are hard to modify to suit a specific need. We created Ono, a social robotics platform, to tackle these issues. Ono is composed entirely from off-the-shelf components and cheap materials, and can be built at a local FabLab at the fraction of the cost of other robots. Ono is also entirely open source and the modular design further encourages modification and reuse of parts of the platform

Neural networks-on-chip for hybrid bio-electronic systems

PhD ThesisBy modelling the brains computation we can further our understanding of its function and develop novel treatments for neurological disorders. The brain is incredibly powerful and energy e cient, but its computation does not t well with the traditional computer architecture developed over the previous 70 years. Therefore, there is growing research focus in developing alternative computing technologies to enhance our neural modelling capability, with the expectation that the technology in itself will also bene t from increased awareness of neural computational paradigms. This thesis focuses upon developing a methodology to study the design of neural computing systems, with an emphasis on studying systems suitable for biomedical experiments. The methodology allows for the design to be optimized according to the application. For example, di erent case studies highlight how to reduce energy consumption, reduce silicon area, or to increase network throughput. High performance processing cores are presented for both Hodgkin-Huxley and Izhikevich neurons incorporating novel design features. Further, a complete energy/area model for a neural-network-on-chip is derived, which is used in two exemplar case-studies: a cortical neural circuit to benchmark typical system performance, illustrating how a 65,000 neuron network could be processed in real-time within a 100mW power budget; and a scalable highperformance processing platform for a cerebellar neural prosthesis. From these case-studies, the contribution of network granularity towards optimal neural-network-on-chip performance is explored

Implantable Micro-Device for Epilepsy Seizure Detection and Subsequent Treatment

RÉSUMÉ L’émergence des micro-dispositifs implantables est une voie prometteuse pour le traitement de troubles neurologiques. Ces systèmes biomédicaux ont été exploités comme traitements non-conventionnels sur des patients chez qui les remèdes habituels sont inefficaces. Les récents progrès qui ont été faits sur les interfaces neuronales directes ont permis aux chercheurs d’analyser l’activité EEG intracérébrale (icEEG) en temps réel pour des fins de traitements. Cette thèse présente un dispositif implantable à base de microsystèmes pouvant capter efficacement des signaux neuronaux, détecter des crises d’épilepsie et y apporter un traitement afin de l’arrêter. Les contributions principales présentées ici ont été rapportées dans cinq articles scientifiques, publiés ou acceptés pour publication dans les revues IEEE, et plusieurs autres tels que «Low Power Electronics» et «Emerging Technologies in Computing». Le microsystème proposé inclus un circuit intégré (CI) à faible consommation énergétique permettant la détection de crises d’épilepsie en temps réel. Cet CI comporte une pré-amplification initiale et un détecteur de crises d’épilepsie. Le pré-amplificateur est constitué d’une nouvelle topologie de stabilisateur d’hacheur réduisant le bruit et la puissance dissipée. Les CI fabriqués ont été testés sur des enregistrements d’icEEG provenant de sept patients épileptiques réfractaires au traitement antiépileptique. Le délai moyen de la détection d’une crise est de 13,5 secondes, soit avant le début des manifestations cliniques évidentes. La consommation totale d’énergie mesurée de cette puce est de 51 μW. Un neurostimulateur à boucle fermée (NSBF), quant à lui, détecte automatiquement les crises en se basant sur les signaux icEEG captés par des électrodes intracrâniennes et permet une rétroaction par une stimulation électrique au même endroit afin d’interrompre ces crises. La puce de détection de crises et le stimulateur électrique à base sur FPGA ont été assemblés à des électrodes afin de compléter la prothèse proposée. Ce NSBF a été validé en utilisant des enregistrements d’icEEG de dix patients souffrant d’épilepsie réfractaire. Les résultats révèlent une performance excellente pour la détection précoce de crises et pour l’auto-déclenchement subséquent d’une stimulation électrique. La consommation énergétique totale du NSBF est de 16 mW. Une autre alternative à la stimulation électrique est l’injection locale de médicaments, un traitement prometteur de l’épilepsie. Un système local de livraison de médicament basé sur un nouveau détecteur asynchrone des crises est présenté.----------ABSTRACT Emerging implantable microdevices hold great promise for the treatment of patients with neurological conditions. These biomedical systems have been exploited as unconventional treatment for the conventionally untreatable patients. Recent progress in brain-machine-interface activities has led the researchers to analyze the intracerebral EEG (icEEG) recording in real-time and deliver subsequent treatments. We present in this thesis a long-term safe and reliable low-power microsystem-based implantable device to perform efficient neural signal recording, seizure detection and subsequent treatment for epilepsy. The main contributions presented in this thesis are reported in five journal manuscripts, published or accepted for publication in IEEE Journals, and many others such as Low Power Electronics, and Emerging Technologies in Computing. The proposed microsystem includes a low-power integrated circuit (IC) intended for real-time epileptic seizure detection. This IC integrates a front-end preamplifier and epileptic seizure detector. The preamplifier is based on a new chopper stabilizer topology that reduces noise and power dissipation. The fabricated IC was tested using icEEG recordings from seven patients with drug-resistant epilepsy. The average seizure detection delay was 13.5 sec, well before the onset of clinical manifestations. The measured total power consumption of this chip is 51 µW. A closed-loop neurostimulator (CLNS) is next introduced, which is dedicated to automatically detect seizure based on icEEG recordings from intracranial electrode contacts and provide an electrical stimulation feedback to the same contacts in order to disrupt these seizures. The seizure detector chip and a dedicated FPGA-based electrical stimulator were assembled together with common recording electrodes to complete the proposed prosthesis. This CLNS was validated offline using recording from ten patients with refractory epilepsy, and showed excellent performance for early detection of seizures and subsequent self-triggering electrical stimulation. Total power consumption of the CLNS is 16 mW. Alternatively, focal drug injection is the promising treatment for epilepsy. A responsive focal drug delivery system based on a new asynchronous seizure detector is also presented. The later system with data-dependent computation reduces up to 49% power consumption compared to the previous synchronous neurostimulator

A Neural Signal Processor for Low-Latency Spike Inference

This thesis describes the development of a system that can assign identities to a population of single-units, in multi-electrode recordings, at single-spike resolution with low-latency. The system has two parts. The first is a Field-Programmable Gate Array (FPGA)-based Neural Signal Processor (NSP) that receives raw input and generates labelled spikes as output, a process referred to as real-time spike inference. The second is a piece of software (Spiketag) that runs on a PC, communicates with the NSP, and generates a spike-sorted model to guide the real-time spike inference. The NSP provides clocks and control signals to five 32-channel INTAN RHD2132 chips to manage the acquisition of 160 channels of raw neural data. In parallel, the NSP further filters, detects and extracts extracellular spike waveforms from the raw neural data recorded by tetrodes or silicon probes and assigns single-unit identity to each detected spike. A set of Python application programming interfaces (APIs) was developed in Spiketag to enable the communication between the NSP and the PC. These APIs allow the NSP to obtain a model from the PC, which holds parameters such as reference channels, spike detection thresholds, spike feature transformation matrix and vector quantized clusters generated by spike sorting a short recording session. Using the spike-sorted model, the NSP performs data acquisition and real-time spike inference simultaneously. Algorithmic modules were implemented in the FPGA and pipelined to compute during 40 ms acquisition intervals. At the output end of the FPGA NSP, the real-time assigned single-unit identity (spike-id) is packaged with the timestamp, the electrode group, and the spike features as a spike-id packet. Spike-id packets are asynchronously transmitted through a low-latency Peripheral Component Interconnect Express (PCIe) interface to the PC, producing the real-time spike trains. The real-time spike trains can be used for further processing, such as real-time decoding. Several types of ground-truth data, including intracellular/extracellular paired recordings, synthesized tetrode extracellular waveforms with ground-truth spike timing and high-channel-count silicon probe recordings with ground-truth animal positions during navigation were used to validate the low-latency (1 ms) and high-accuracy (as high as state-of-the-art offline sorting and decoding algorithms) of the NSP’s real-time spike inference and the NSP-based real-time population decoding performance

Glucose-powered neuroelectronics

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.Cataloged from PDF version of thesis.Includes bibliographical references (p. 157-164).A holy grail of bioelectronics is to engineer biologically implantable systems that can be embedded without disturbing their local environments, while harvesting from their surroundings all of the power they require. As implantable electronic devices become increasingly prevalent in scientific research and in the diagnosis, management, and treatment of human disease, there is correspondingly increasing demand for devices with unlimited functional lifetimes that integrate seamlessly with their hosts in these two ways. This thesis presents significant progress toward establishing the feasibility of one such system: A brain-machine interface powered by a bioimplantable fuel cell that harvests energy from extracellular glucose in the cerebrospinal fluid surrounding the brain. The first part of this thesis describes a set of biomimetic algorithms and low-power circuit architectures for decoding electrical signals from ensembles of neurons in the brain. The decoders are intended for use in the context of neural rehabilitation, to provide paralyzed or otherwise disabled patients with instantaneous, natural, thought-based control of robotic prosthetic limbs and other external devices. This thesis presents a detailed discussion of the decoding algorithms, descriptions of the low-power analog and digital circuit architectures used to implement the decoders, and results validating their performance when applied to decode real neural data. A major constraint on brain-implanted electronic devices is the requirement that they consume and dissipate very little power, so as not to damage surrounding brain tissue. The systems described here address that constraint, computing in the style of biological neural networks, and using arithmetic-free, purely logical primitives to establish universal computing architectures for neural decoding. The second part of this thesis describes the development of an implantable fuel cell powered by extracellular glucose at concentrations such as those found in the cerebrospinal fluid surrounding the brain. The theoretical foundations, details of design and fabrication, mechanical and electrochemical characterization, as well as in vitro performance data for the fuel cell are presented.by Benjamin Isaac Rapoport.Ph.D

Designing a Clinically Viable Brain Computer Interface for the Control of Neuroprosthetics

Currently no brain computer interfaces exist that can control the individual fingers of a hand prosthesis and is suitable for permanent implantation in and individual with a single limb amputation. Within this thesis a design for a novel minimally invasive brain computer interface system is proposed that would be relatively low risk, allow for control of a prosthesis using existing cortical structures and be suitable for patients with loss of a single limb. The early stage development and proof of concept work has been done taking into account relevant regulatory requirements, so that a finalised version of the design would be suitable for regulatory certification. This novel design is found to be worth pursuing and may in turn open up new research opportunities