Genetic approach to minimizing energy consumption of VLSI processors using multiple supply voltages

科研費報告書収録論文(課題番号:17300009/研究代表者:亀山充隆/システムインテグレーション理論に基づく高安全知能自動車用VLSIの最適設計

自律電源電圧制御に基づく低消費電力リコンフィギャラブルVLSI アーキテクチャに関する研究

Tohoku University亀山充隆課

Parallel and Distributed Computing

The 14 chapters presented in this book cover a wide variety of representative works ranging from hardware design to application development. Particularly, the topics that are addressed are programmable and reconfigurable devices and systems, dependability of GPUs (General Purpose Units), network topologies, cache coherence protocols, resource allocation, scheduling algorithms, peertopeer networks, largescale network simulation, and parallel routines and algorithms. In this way, the articles included in this book constitute an excellent reference for engineers and researchers who have particular interests in each of these topics in parallel and distributed computing

Architectures of new switching systems.

by Lam Wan.Thesis submitted in: November 1997.Thesis (M.Phil.)--Chinese University of Hong Kong, 1998.Includes bibliographical references (leaves 96-102).Abstract also in Chinese.Part IChapter 1 --- Introduction to Integrated Intelligent Personal Communication System --- p.1Chapter 2 --- The Switching Architecture --- p.5Chapter 2.1 --- The Overall Switching Architecture --- p.6Chapter 2.2 --- Switching Module --- p.10Chapter 2.2.1 --- Traffic Routing in Switching Module --- p.11Chapter 2.2.2 --- Structure of Switching Module --- p.15Chapter 2.2.3 --- Wireless Base Interface --- p.16Chapter 2.2.4 --- Trunk Interface --- p.18Chapter 2.2.5 --- Analog Interfaces --- p.18Chapter 2.3 --- Network Intelligence --- p.19Chapter 2.4 --- Wireless Part --- p.21Chapter 2.4.1 --- Call-Setup in IIPCS --- p.24Chapter 2.4.2 --- Handoff --- p.25Chapter 2.4.3 --- Wireless Base --- p.27Chapter 2.5 --- Downstream Wired Extensions --- p.28Chapter 2.6 --- Upstream Wired Part --- p.28Chapter 2.7 --- Voice System --- p.28Chapter 2.8 --- Features of the IIPCS --- p.29Chapter 3 --- Concluding Remarks --- p.33Chapter 3.1 --- Summary --- p.35Chapter 3.2 --- Directions for Further Research --- p.36Part IIChapter 4 --- Introduction to Next-Generation Switch --- p.37Chapter 5 --- Architecture of Next-Generation Switch --- p.41Chapter 5.1 --- Overall Architecture of Next-Generation Switch --- p.42Chapter 5.1.1 --- Interface module --- p.44Chapter 5.1.2 --- Packetizer --- p.46Chapter 5.2 --- Concentration Fabric --- p.50Chapter 5.3 --- Shared-Buffer Memory Switch --- p.53Chapter 6 --- Concentration Networks --- p.56Chapter 6.1 --- Background of Concentration Networks --- p.56Chapter 6.2 --- k-Sorting --- p.63Chapter 6.3 --- Concentrator --- p.72Chapter 6.3.1 --- Nk-to-k Concentrator --- p.73Chapter 6.3.2 --- Match between Circles with Cost Reduction --- p.75Chapter 6.4 --- The Structure of a Molecule --- p.78Chapter 6.5 --- Summary --- p.81Chapter 7 --- Lock-Latch Algorithm --- p.82Chapter 8 --- Performance Evaluation --- p.88Chapter 9 --- Concluding Remarks --- p.93Chapter 9.1 --- LSI Implementation --- p.94Chapter 9.2 --- Summary --- p.95Bibliograph

低電力非同期回路の面積高効率化設計

Tohoku University亀山充隆課