An organic memristor as the building block for bio-inspired adaptive networks

This thesis reports the research path I followed during my PhD course, which i followed from January 2008 to December 2010 working at the University of Parma, in the Laboratory of Molecular Nanotechnologies, under the supervision of Prof. Marco P. Fontana and Dr. Victor Erokhin, within the framework of an interdisciplinary, international research project called BION – Biologically inspired Organized Networks. The keystone of my research is an organic memristor, a two terminal polymeric electronic device recently developed in our research group at the university of Parma. A memristor is a passive electronic device in which the electrical resistance depends on the electrical charge that has passed through it, and hence is adjustable by applying the appropriate electric potential or sequence of potentials. As of the beginning of my PhD, the device was in its early characterization stages, but it was already clear that it could be used to mimic the kind of plasticity found in synapses within neuronal circuits. In the thesis I show some further characterization work, used for engineering the device to maximize its more useful characteristics and to deepen our understanding of the functioning of the device, as well as the work done on. The knowledge of computational neuroscience acquired during this side project has proved very useful to better coordinate research in the material science side of the project, whose ultimate goal is the realization of a new, highly innovative technology for the production of functional molecular assemblies that can perform advanced tasks of information processing, involving learning and decision making, and that can be tailored down to the nanoscale.Questa tesi riporta il percorso di ricerca seguito durante il mio dottorato di ricerca, che ho svolto da gennaio 2008 a dicembre 2010 lavorando nel Laboratorio di Nanotecnologie Molecolari, presso l'Università di Parma, , sotto la supervisione del Prof. Marco P. Fontana e del Dott. Victor Erokhin, nel quadro di un approccio interdisciplinare, progetto di ricerca internazionale denominato BION - Biologically ispired Organized Networks . La chiave di svolta della mia ricerca è un memristor organico, un dispositivo a due terminali elettronici polimerici recentemente messo a punto nel nostro gruppo di ricerca presso l'università di Parma. Un memristor è un dispositivo elettronico passivo in cui la resistenza elettrica dipende dalla carica elettrica che è passata attraverso di essa, e quindi è regolabile applicando il potenziale elettrico appropriato o una sequenza di potenziali. A partire dall'inizio del mio dottorato di ricerca, il dispositivo è stato nelle sue fasi di caratterizzazione iniziale, ma era già chiaro che poteva essere usata per simulare il tipo di plasticità trovato in sinapsi all'interno di circuiti neuronali. Nella tesi ho mostrato un ulteriore lavoro di caratterizzazione, utilizzato per l'ingegneria del dispositivo al fine di massimizzare le sue caratteristiche più utili e di approfondire la nostra comprensione del funzionamento del dispositivo, così come il lavoro svolto. La conoscenza delle neuroscienze computazionali acquisite nel corso di questo progetto parallelo si è rivelato molto utile per meglio coordinare la ricerca per quanto riguarda il materiale scientifico del progetto, il cui scopo ultimo è la realizzazione di una nuova tecnologia altamente innovativa per la produzione di composti molecolari funzionali in grado di eseguire attività avanzate di elaborazione delle informazioni, che coinvolgano l'apprendimento e il processo decisionale, e che può essere adattata fino alla scala nanometrica

Phase Noise Analyses and Measurements in the Hybrid Memristor-CMOS Phase-Locked Loop Design and Devices Beyond Bulk CMOS

Phase-locked loop (PLLs) has been widely used in analog or mixed-signal integrated circuits. Since there is an increasing market for low noise and high speed devices, PLLs are being employed in communications. In this dissertation, we investigated phase noise, tuning range, jitter, and power performances in different architectures of PLL designs. More energy efficient devices such as memristor, graphene, transition metal di-chalcogenide (TMDC) materials and their respective transistors are introduced in the design phase-locked loop. Subsequently, we modeled phase noise of a CMOS phase-locked loop from the superposition of noises from its building blocks which comprises of a voltage-controlled oscillator, loop filter, frequency divider, phase-frequency detector, and the auxiliary input reference clock. Similarly, a linear time-invariant model that has additive noise sources in frequency domain is used to analyze the phase noise. The modeled phase noise results are further compared with the corresponding phase-locked loop designs in different n-well CMOS processes. With the scaling of CMOS technology and the increase of the electrical field, the problem of short channel effects (SCE) has become dominant, which causes decay in subthreshold slope (SS) and positive and negative shifts in the threshold voltages of nMOS and pMOS transistors, respectively. Various devices are proposed to continue extending Moore\u27s law and the roadmap in semiconductor industry. We employed tunnel field effect transistor owing to its better performance in terms of SS, leakage current, power consumption etc. Applying an appropriate bias voltage to the gate-source region of TFET causes the valence band to align with the conduction band and injecting the charge carriers. Similarly, under reverse bias, the two bands are misaligned and there is no injection of carriers. We implemented graphene TFET and MoS2 in PLL design and the results show improvements in phase noise, jitter, tuning range, and frequency of operation. In addition, the power consumption is greatly reduced due to the low supply voltage of tunnel field effect transistor