4,801 research outputs found
Quantifying Potential Energy Efficiency Gain in Green Cellular Wireless Networks
Conventional cellular wireless networks were designed with the purpose of
providing high throughput for the user and high capacity for the service
provider, without any provisions of energy efficiency. As a result, these
networks have an enormous Carbon footprint. In this paper, we describe the
sources of the inefficiencies in such networks. First we present results of the
studies on how much Carbon footprint such networks generate. We also discuss
how much more mobile traffic is expected to increase so that this Carbon
footprint will even increase tremendously more. We then discuss specific
sources of inefficiency and potential sources of improvement at the physical
layer as well as at higher layers of the communication protocol hierarchy. In
particular, considering that most of the energy inefficiency in cellular
wireless networks is at the base stations, we discuss multi-tier networks and
point to the potential of exploiting mobility patterns in order to use base
station energy judiciously. We then investigate potential methods to reduce
this inefficiency and quantify their individual contributions. By a
consideration of the combination of all potential gains, we conclude that an
improvement in energy consumption in cellular wireless networks by two orders
of magnitude, or even more, is possible.Comment: arXiv admin note: text overlap with arXiv:1210.843
Efficient FPGA implementation of high-throughput mixed radix multipath delay commutator FFT processor for MIMO-OFDM
This article presents and evaluates pipelined architecture designs for an improved high-frequency Fast Fourier
Transform (FFT) processor implemented on Field Programmable Gate Arrays (FPGA) for Multiple Input Multiple Output
Orthogonal Frequency Division Multiplexing (MIMO-OFDM). The architecture presented is a Mixed-Radix Multipath Delay
Commutator. The presented parallel architecture utilizes fewer hardware resources compared to Radix-2 architecture,
while maintaining simple control and butterfly structures inherent to Radix-2 implementations. The high-frequency
design presented allows enhancing system throughput without requiring additional parallel data paths common in
other current approaches, the presented design can process two and four independent data streams in parallel
and is suitable for scaling to any power of two FFT size N. FPGA implementation of the architecture demonstrated
significant resource efficiency and high-throughput in comparison to relevant current approaches within
literature. The proposed architecture designs were realized with Xilinx System Generator (XSG) and evaluated
on both Virtex-5 and Virtex-7 FPGA devices. Post place and route results demonstrated maximum frequency
values over 400 MHz and 470 MHz for Virtex-5 and Virtex-7 FPGA devices respectively
Development of a dc-ac power conditioner for wind generator by using neural network
This project present of development single phase DC-AC converter for wind
generator application. The mathematical model of the wind generator and Artificial
Neural Network control for DC-AC converter is derived. The controller is designed to
stabilize the output voltage of DC-AC converter. To verify the effectiveness of the
proposal controller, both simulation and experimental are developed. The simulation and
experimental result show that the amplitude of output voltage of the DC-AC converter
can be controlled
An Opportunistic Error Correction Layer for OFDM Systems
In this paper, we propose a novel cross layer scheme to lower power\ud
consumption of ADCs in OFDM systems, which is based on resolution\ud
adaptive ADCs and Fountain codes. The key part in the new proposed\ud
system is that the dynamic range of ADCs can be reduced by\ud
discarding the packets which are transmitted over 'bad' sub\ud
carriers. Correspondingly, the power consumption in ADCs can be\ud
reduced. Also, the new system does not process all the packets but\ud
only processes surviving packets. This new error correction layer\ud
does not require perfect channel knowledge, so it can be used in a\ud
realistic system where the channel is estimated. With this new\ud
approach, more than 70% of the energy consumption in the ADC can be\ud
saved compared with the conventional IEEE 802.11a WLAN system under\ud
the same channel conditions and throughput. The ADC in a receiver\ud
can consume up to 50% of the total baseband energy. Moreover, to\ud
reduce the overhead of Fountain codes, we apply message passing and\ud
Gaussian elimination in the decoder. In this way, the overhead is\ud
3% for a small block size (i.e. 500 packets). Using both methods\ud
results in an efficient system with low delay
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