270 research outputs found

    Implementation of packaged integrated antenna with embedded front end for Bluetooth applications

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    The design, integration and realization of system in enhanced package approach towards fully functional system level integration by using a compact Bluetooth USB dongle as the demonstrator is presented here. The integration was done on FR4 substrates, which is totally compatible with today’s printed circuit board manufacturing capability. A commercially available Bluetooth integrated chip was chosen as the chipset of our demonstrator, and a package integrated antenna together with an embedded front end completes the system in package integration. The front end developed here is based on an embedded meander line combline filter and an embedded transformer balun. The filter has a 35% area reduction when compared with the classical combline filter and similar performance. The balun has the coils distributed on three layers that minimized the board area needed it and optimizes the performances. The proposed packaged integrated antenna approach is successfully demonstrated here and the new module shows excellent performance when compared with a commercial solution, surpassing the normal Bluetooth class II dongle range which is up to 10 m and increasing the module range up to 120 m without an extra power amplifier

    An approach to achieve zero turnaround time in TDD operation on SDR front-end

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    Thanks to the digitization and softwarization of radio communication, the development cycle of new radio technologies can be significantly accelerated by prototyping on software-defined radio (SDR) platforms. However, a slow turnaround time (TT) of the front-end of an SDR for switching from receiving mode to transmitting mode or vice versa, are jeopardizing the prototyping of wireless protocols, standards, or systems with stringent latency requirements. In this paper, a novel solution called BaseBand processing unit operating in Half Duplex mode and analog Radio Frequency front-end operating in Full Duplex mode, BBHD-RFFD, is presented to reduce the TT on SDR. A prototype is realized on the widely adopted AD9361 radio frequency frontend to prove the validity of the proposed solution. Experiments unveil that for any type of application, the TT in time division duplex (TDD) operation mode can be reduced to zero by the BBHD-RFFD approach, with negligible impact on the communication system in terms of receiver sensitivity. The impact is measured for an in-house IEEE 802.15.4 compliant transceiver. When compared against the conventional TDD approach, only a 7.5-dB degradation is observed with the BBHD-RFFD approach. The measured sensitivity of -91 dBm is still well above the minimum level (i.e., -85 dBm at 2.4 GHz) defined by the IEEE 802.15.4 standard

    Measurements on an autonomous wireless payload at 635 km distance using a sensitive radio telescope

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    The Delfi-C3 spacecraft carries the first autonomous wireless payload in space. This payload is a wireless sun sensor developed by TNO in the Netherlands. The data captured by the sensor is wirelessly transported to the central computer system inside the spacecraft. Since no additional power supply is needed, this sensor is fully autonomous. The radio link is a FSK link at 915 MHz using a standard Nordic Chipset. At the Delfi C3 spacecraft two of these autonomous sun sensors are mounted. Unfortunately only one is operational. Using the Westerbork Synthesis Radio Telescope we tried to detect the 915 MHz signal from the sun sensor to the internal receiver. Before the measurements could be done, the effects of the shielding of the spacecraft case were measured using a spare spacecraft. The final obtained link budget showed a 10 dB SNR when using a 25 meter single dish telescope. Measurements were performed at the WSRT by using multiple radio telescopes placed in the orbit direction. The downlink signal of Delfi C3 was detected, but the 915 MHz signal was not as it should be. We conclude that the sun sensor is malfunctioning

    Radio hardware virtualization for software-defined wireless networks

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    Software-Defined Network (SDN) is a promising architecture for next generation Internet. SDN can achieve Network Function Virtualization much more efficiently than conventional architectures by splitting the data and control planes. Though SDN emerged first in wired network, its wireless counterpart Software-Defined Wireless Network (SDWN) also attracted an increasing amount of interest in the recent years. Wireless networks have some distinct characteristics compared to the wired networks due to the wireless channel dynamics. Therefore, network controllers present some extra degrees of freedom, such as taking measurements against interference and noise, or adapting channels according to the radio spectrum occupation. These specific characteristics bring about more challenges to wireless SDNs. Currently, SDWN implementations are mainly using customized firmware, such as OpenWRT, running on an embedded application processor in commercial WiFi chips, and restricted to layers above lower Media Access Control. This limitation comes from the fact that radio hardware usually require specific drivers, which have a proprietary implementation by various chipset vendors. Hence, it is difficult, if not impossible, to achieve virtualization on the radio hardware. However, this status has been changing as Software-Defined Radio (SDR) systems open up the entire radio communication stack to radio hobbyists and researchers. The bridge between SDR and SDN will make it possible to bring the softwarization and virtualization of wireless networks down to the physical layer, which will unlock the full potential of SDWN. This paper investigates the necessity and feasibility of extending the virtualization of wireless networks towards the radio hardware. A SDR architecture is presented for radio hardware virtualization in order to facilitate SDWN design and experimentation. We do believe that by adopting the virtualization-oriented hardware accelerator design presented here, an all-layer end-to-end high performance SDWN can be achieved

    Surface MIMO: Using Conductive Surfaces For MIMO Between Small Devices

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    As connected devices continue to decrease in size, we explore the idea of leveraging everyday surfaces such as tabletops and walls to augment the wireless capabilities of devices. Specifically, we introduce Surface MIMO, a technique that enables MIMO communication between small devices via surfaces coated with conductive paint or covered with conductive cloth. These surfaces act as an additional spatial path that enables MIMO capabilities without increasing the physical size of the devices themselves. We provide an extensive characterization of these surfaces that reveal their effect on the propagation of EM waves. Our evaluation shows that we can enable additional spatial streams using the conductive surface and achieve average throughput gains of 2.6-3x for small devices. Finally, we also leverage the wideband characteristics of these conductive surfaces to demonstrate the first Gbps surface communication system that can directly transfer bits through the surface at up to 1.3 Gbps.Comment: MobiCom '1

    Facilitating wireless coexistence research

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    A RISC-V SOC for Terahertz IoT Devices: Implementation and design challenges

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    Terahertz (THz) communication is considered a viable approach to augmenting the communication capacity of prospective Internet-of-Things (IoT) resulting in enhanced spectral efficiency. This study first provides an outline of the design challenges encountered in developing THz transceivers. This paper introduces advanced approaches and a unique methodology known as Modified Pulse-width Modulation (MPWM) to address the issues in the THz domain. In this situation involving a transceiver that handles complex modulation schemes, the presence of a mixed signal through a high-resolution digital-to-analog converter (DAC) in the transmitter greatly contributes to the limitation in maintaining linearity at high frequencies. The utilization of Pulse-width Modulation-based Digital-to-Analog Converters (PWM-DACs) has garnered significant attention among scholars due to its efficiency and affordability. However, the converters' performance is restricted by insufficient conversion speed and precision, especially in the context of high-resolution, high-order modulation schemes for THz wireless communications. The MPWM framework offers a multitude of adjustable options, rendering the final MPWM-DAC highly adaptable for a diverse array of application scenarios. Comparative performance assessments indicate that MPWM-DACs have enhanced conversion speed compared to standard PWM-DACs, and they also provide greater accuracy in comparison to Pulse-count Modulation DACs (PCM-DACs). The study presents a comprehensive examination of the core principles, spectrum characteristics, and evaluation metrics, as well as the development and experimental validation of the MPWM method. Furthermore, we present a RISC-V System-on-Chip (SoC) that incorporates an MPWM-DAC, offering a highly favorable resolution for THz IoT communications.Comment: 18 pages, 17 figures, journa

    CMCVT : a concurrent multi-channel virtual transceiver

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    State-of-the-art wireless Gateways (GW) used in Internet of Things (IoT) offer a single channel radio link, which limits the capabilities of the IoT network controlled by the GW, as the GW can only use a single channel at a time to communicate with the end-device(s). The quality of service (e.g., aggregate throughput, latency) offered by a single channel GW could be substantially improved by employing a multi-channel transceiver, which is capable of transmitting/receiving data on different radio channels simultaneously, particularly for larger wireless networks. However, current solutions available in both research and commercial communities only offer multi-channel receiver capabilities, and do not incorporate the multi-channel transmitter part. In addition, in terms of implementation, these multi-channel receivers duplicate single-channel hardware functionality. In this paper, for the first time, a novel concurrent multi-channel virtual transceiver is introduced. The virtual transceiver offers multi-channel capabilities and uses the same single-hardware hardware implementation for the Physical (PHY) layer by employing the virtualization technique. This new virtual transceiver concept is demonstrated for an IEEE 802.15.4 based 8 x 8 channel transceiver, implemented on an Field Programmable Gate Array (FPGA) of a modern Software Defined Radio and is compared with the existing duplication approach. The duplication approach consumes 9008 LUTs, and 12120 FFs, whereas the proposed approach occupies only 2959 LUTs and 2105 FFs, saving 67.15% LUTs and 82.63% FFs in comparison with the duplication approach. The experimental results reveal that the virtual transceiver provides the same performance (e.g., receiver sensitivity of -98.5dBm) as the transceiver achieved by duplicating the PHY layers but consumes much less hardware resources. (C) 2020 The Authors. Published by Elsevier GmbH
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