A Low-Power Passive UHF Tag With High-Precision Temperature Sensor for Human Body Application

Radio frequency identification (RFID) tags are widely used in various electronic devices due to their low cost, simple structure, and convenient data reading. This topic aims to study the key technologies of ultra-high frequency (UHF) RFID tags and high-precision temperature sensors, and how to reduce the power consumption of the temperature sensor and the overall circuits while maintaining minimal loss of performance. Combined with the biomedicine, an innovative high-precision human UHF RFID chip for body temperature monitoring is designed. In this study, a ring oscillator whose output frequency is linearly related to temperature is designed and proposed as a temperature-sensing circuit by innovatively combining auxiliary calibration technology. Then, a binary counter is used to count the pulses, and the temperature is ultimately calculated. This topic designed a relaxation oscillator independent of voltage and current. The various types of resistors were used to offset the temperature deviation. A current mirror array calibration circuit is used to calibrate the process corner deviation of the clock circuit with a self-calibration algorithm. This study mainly contributes to reducing power consumption and improving accuracy. The total power consumption of the RF/analog front-end and temperature sensor is 7.65µW. The measurement error of the temperature sensor in the range of 0 to 60◦C is less than ±0.1%, and the accuracy of the output frequency of the clock circuit is ±2.5%

Introduction to Radio-frequency Identification (RFID)

This project presents the fundamental aspects of the RFID (Radio-frequency identifica-tion) technology used to establish wireless communications. The project focuses on thepassive mode of RFID, where the receiver does not have any power supply, which allowsits miniaturization and low cost.On the other hand, two articles from different authors are analyzed. The first consists onthe design of a very low power passive receiver through various techniques of optimizationin the hardware’s manufacture.In the second, a drone is used as an intermediate element between the transmitter and thereceiver to extend up to 10 times the typical range of passive RFID. The study focuses onthe treatment of the RF signal to considerably eliminate the interferences and to preciselylocalize the receiver.Outgoin

A self-powered single-chip wireless sensor platform

Internet of things” require a large array of low-cost sensor nodes, wireless connectivity, low power operation and system intelligence. On the other hand, wireless biomedical implants demand additional specifications including small form factor, a choice of wireless operating frequencies within the window for minimum tissue loss and bio-compatibility This thesis describes a low power and low-cost internet of things system suitable for implant applications that is implemented in its entirety on a single standard CMOS chip with an area smaller than 0.5 mm2. The chip includes integrated sensors, ultra-low-power transceivers, and additional interface and digital control electronics while it does not require a battery or complex packaging schemes. It is powered through electromagnetic (EM) radiation using its on-chip miniature antenna that also assists with transmit and receive functions. The chip can operate at a short distance (a few centimeters) from an EM source that also serves as its wireless link. Design methodology, system simulation and optimization and early measurement results are presented

A Design of a High-Performance Analog Front-End for Passive UHF RFID Tag EPC C1G2

This paper introduces a high-performance analog front end for passive UHF RFID tag compatible with the EPC Class-1 Generation 2 (EPC C1G2) standard protocol. The proposed front end of a passive tag which contains the following modules: a power generation circuit which is composed of a matching circuit and an RF-limiter circuit, an NMOS rectifier, a DC limiter, a voltage regulation, a modulation and ASK demodulation circuit, a power-on-reset circuit, a ring oscillator which generates a clock of 1.28 MHz. The originality of this work is the proposal of a voltage regulation circuit composed of two distinct LDO regulators that share the same reference voltage and are designed to generate a Vdd1 (0.5 V) for the analog supply and Vdd2 (1 V) for digital power supply, under conditions of 50 Ω antenna, 900 MHz, a sensitivity of -24 dBm and a maximum consumption of 1 µW. The operating distance of the RFID is more than 25 meters based on the regulated 4 W effective isotropic radiated power (EIRP). The chip area of the proposed analog front end is only 79 μm × 83 μm. The simulation results in 90 nm CMOS process confirm the performance of the proposed analog front-end

Theoretical BER Evaluation of Passive RFID Tag-To-Tag Communications

International audienceThe concept of UHF RFID passive tag-to-tag communication has been introduced and opens new promising perspectives in the field of Internet-of-Things. This concept enables two powerless tags to exchange information using an external source. Moreover, a simulation framework has been proposed as a tool allowing the performance evaluation of tag-to-tag radio links in terms of Bit Error Rate (BER). The aim of this paper is to provide a theoretical framework for BER estimation. The theoretical framework takes into account various parameters such as modulation rate, receivers topology and the electromagnetic coupling of the tags. Furthermore, in order to validate the obtained results, they are compared with the ones obtained by realistic simulations