Observation of chaotic beats in a driven memristive Chua's circuit

In this paper, a time varying resistive circuit realising the action of an active three segment piecewise linear flux controlled memristor is proposed. Using this as the nonlinearity, a driven Chua's circuit is implemented. The phenomenon of chaotic beats in this circuit is observed for a suitable choice of parameters. The memristor acts as a chaotically time varying resistor (CTVR), switching between a less conductive OFF state and a more conductive ON state. This chaotic switching is governed by the dynamics of the driven Chua's circuit of which the memristor is an integral part. The occurrence of beats is essentially due to the interaction of the memristor aided self oscillations of the circuit and the external driving sinusoidal forcing. Upon slight tuning/detuning of the frequencies of the memristor switching and that of the external force, constructive and destructive interferences occur leading to revivals and collapses in amplitudes of the circuit variables, which we refer as chaotic beats. Numerical simulations and Multisim modelling as well as statistical analyses have been carried out to observe as well as to understand and verify the mechanism leading to chaotic beats.Comment: 30 pages, 16 figures; Submitted to IJB

Fully CMOS Memristor Based Chaotic Circuit

This paper demonstrates the design of a fully CMOS chaotic circuit consisting of only DDCC based memristor and inductance simulator. Our design is composed of these active blocks using CMOS 0.18 µm process technology with symmetric ±1.25 V supply voltages. A new single DDCC+ based topology is used as the inductance simulator. Simulation results verify that the design proposed satisfies both memristor properties and the chaotic behavior of the circuit. Simulations performed illustrate the success of the proposed design for the realization of CMOS based chaotic applications

Chaotic memristor

We suggest and experimentally demonstrate a chaotic memory resistor (memristor). The core of our approach is to use a resistive system whose equations of motion for its internal state variables are similar to those describing a particle in a multi-well potential. Using a memristor emulator, the chaotic memristor is realized and its chaotic properties are measured. A Poincar\'{e} plot showing chaos is presented for a simple nonautonomous circuit involving only a voltage source directly connected in series to a memristor and a standard resistor. We also explore theoretically some details of this system, plotting the attractor and calculating Lyapunov exponents. The multi-well potential used resembles that of many nanoscale memristive devices, suggesting the possibility of chaotic dynamics in other existing memristive systems.Comment: Applied Physics A (in press