Tensor Computation: A New Framework for High-Dimensional Problems in EDA

Many critical EDA problems suffer from the curse of dimensionality, i.e. the very fast-scaling computational burden produced by large number of parameters and/or unknown variables. This phenomenon may be caused by multiple spatial or temporal factors (e.g. 3-D field solvers discretizations and multi-rate circuit simulation), nonlinearity of devices and circuits, large number of design or optimization parameters (e.g. full-chip routing/placement and circuit sizing), or extensive process variations (e.g. variability/reliability analysis and design for manufacturability). The computational challenges generated by such high dimensional problems are generally hard to handle efficiently with traditional EDA core algorithms that are based on matrix and vector computation. This paper presents "tensor computation" as an alternative general framework for the development of efficient EDA algorithms and tools. A tensor is a high-dimensional generalization of a matrix and a vector, and is a natural choice for both storing and solving efficiently high-dimensional EDA problems. This paper gives a basic tutorial on tensors, demonstrates some recent examples of EDA applications (e.g., nonlinear circuit modeling and high-dimensional uncertainty quantification), and suggests further open EDA problems where the use of tensor computation could be of advantage.Comment: 14 figures. Accepted by IEEE Trans. CAD of Integrated Circuits and System

Optimal analog wavelet bases construction using hybrid optimization algorithm

An approach for the construction of optimal analog wavelet bases is presented. First, the definition of an analog wavelet is given. Based on the definition and the least-squares error criterion, a general framework for designing optimal analog wavelet bases is established, which is one of difficult nonlinear constrained optimization problems. Then, to solve this problem, a hybrid algorithm by combining chaotic map particle swarm optimization (CPSO) with local sequential quadratic programming (SQP) is proposed. CPSO is an improved PSO in which the saw tooth chaotic map is used to raise its global search ability. CPSO is a global optimizer to search the estimates of the global solution, while the SQP is employed for the local search and refining the estimates. Benefiting from good global search ability of CPSO and powerful local search ability of SQP, a high-precision global optimum in this problem can be gained. Finally, a series of optimal analog wavelet bases are constructed using the hybrid algorithm. The proposed method is tested for various wavelet bases and the improved performance is compared with previous works.Peer reviewedFinal Published versio

Optimizing construction of scheduled data flow graph for on-line testability

The objective of this work is to develop a new methodology for behavioural synthesis using a flow of synthesis, better suited to the scheduling of independent calculations and non-concurrent online testing. The traditional behavioural synthesis process can be defined as the compilation of an algorithmic specification into an architecture composed of a data path and a controller. This stream of synthesis generally involves scheduling, resource allocation, generation of the data path and controller synthesis. Experiments showed that optimization started at the high level synthesis improves the performance of the result, yet the current tools do not offer synthesis optimizations that from the RTL level. This justifies the development of an optimization methodology which takes effect from the behavioural specification and accompanying the synthesis process in its various stages. In this paper we propose the use of algebraic properties (commutativity, associativity and distributivity) to transform readable mathematical formulas of algorithmic specifications into mathematical formulas evaluated efficiently. This will effectively reduce the execution time of scheduling calculations and increase the possibilities of testability

ASC: A stream compiler for computing with FPGAs

Published versio