2 research outputs found

    All-Digital High Resolution D/A Conversion by Dyadic Digital Pulse Modulation

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    In this paper, the limitations of digital-to-analog (D/A) conversion by Digital Pulse Width Modulation (DPWM) are addressed and the novel Dyadic Digital Pulse Modulation (DDPM) technique for all-digital, low cost, high resolution, Nyquist-rate D/A conversion is proposed. Thanks to the spectral characteristics of the new modulation, in particular, the requirements of the filter needed to extract the baseband component of DPWM signals can be significantly released so that to be suitable to inexpensive integration on silicon in analog interfaces for nanoscale integrated systems. After the new DDPM technique and its properties are introduced on a theoretical basis, the implementation of a D/A converter (DAC) based on the proposed modulation is addressed and its performance in terms of noise and linearity is discussed. A 16-bit DDPM-DAC prototype is finally synthesized on a field-programmable gate array (FPGA) and experimentally characterized

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    ํ•™์œ„๋…ผ๋ฌธ (๋ฐ•์‚ฌ)-- ์„œ์šธ๋Œ€ํ•™๊ต ๋Œ€ํ•™์› ๊ณต๊ณผ๋Œ€ํ•™ ์ „๊ธฐยท์ปดํ“จํ„ฐ๊ณตํ•™๋ถ€, 2017. 8. ๊น€์žฌํ•˜.Fast-emerging electronic device applications demand a variety of new mixed-signal ICs to be developed in fast cycle and with low cost. While field-programmable gate arrays (FPGAs) are established solutions for timely and low-cost prototyping of digital systems, their counterpart for mixed-signal circuits is still an active area for research. This thesis presents a design of a field-programmable IC for analog/mixed-signal circuits, which solves many challenges with the previous works by performing analog functions in time domain. In order to realize the field-programmable analog functionality, time-domain configurable analog block (TCAB) is proposed. A single TCAB can be programmed to various analog circuits, including a time-to-digital converter, digitally-controlled oscillator, digitally-controlled delay cell, digital pulse-width modulator, and phase interpolator. In addition, the TCABs convey and process analog information using the frequency, pulse width, delay, or phase of digital pulses or pulse sequences, rather than using analog voltage or current signals for less susceptibility to attenuation and noise. This analog information expressed in the digital pulses makes it easy to implement scalable programmable interconnects among the TCABs. The architecture of field-programmable IC capable of emulating todays diverse mixed-signal systems is also introduced. In addition to the TCABs, the proposed IC also includes arrays of configurable logic blocks (CLBs) and programmable arithmetic logic units (ALUs) for programmable digital functions. By programming the functionality of the TCAB, CLB, and ALU arrays and configuring the interconnects, the chip can implement various mixed-signal systems. A prototype IC fabricated with 65-nm CMOS technology demonstrates the versatile programmability of the proposed TCAB and the IC by being successfully operated as a 1-GHz phase-locked loop with a 12.3-psrms integrated jitter, as a 50-MS/s analog-to-digital converter with a 32.5-dB SNDR, and as a 1.2-to-0.7V DCโ€“DC converter with 95.5 % efficiency.CHAPTER 1 INTRODUCTION 1 1.1 MOTIVATIONS 1 1.2 THESIS CONTRIBUTION AND ORGANIZATION 5 CHAPTER 2 TIME-DOMAIN CONFIGURABLE ANALOG BLOCK 7 2.1 OVERVIEW OF THE TCAB 9 2.1.1. RECONFIGURABLE FUNCTIONALITY 9 2.1.2. TIME-DOMAIN SIGNAL PROCESSING 14 2.2 CIRCUIT IMPLEMENTATION OF THE TCAB 17 2.3 VERSATILE PROGRAMMABILITY OF TCAB 24 2.3.1. RELAXATION OSCILLATOR 24 2.3.2. DIGITALLY-CONTROLLED OSCILLATOR 28 2.3.3. DIGITAL PULSE-WIDTH MODULATOR 32 2.3.4. GATED OSCILLATOR 34 2.3.5. DIGITALLY-CONTROLLED DELAY CELL 35 2.3.6. PHASE INTERPOLATOR 37 2.3.7. MULTIPHASE DCO 39 2.3.8. NON-OVERLAPPING PULSE GENERATOR 41 2.4 TCAB ARRAY WITH PROGRAMMABLE INTERCONNECTS 43 2.4.1. TCAB ARRAY COMPOSITION 43 2.4.2. PROGRAMMABLE INTERCONNECTS 44 CHAPTER 3 PROPOSED ARCHITECTURE FOR FIELD-PROGRAMMABLE MIXED-SIGNAL IC 49 CHAPTER 4 CIRCUIT IMPLEMENTATION 54 4.1 CONFIGURABLE LOGIC BLOCK ARRAY 55 4.1.1. CONFIGURABLE LOGIC BLOCK 55 4.1.2. CLB ARRAY 56 4.2 ARITHMETIC LOGIC UNIT ARRAY 58 4.2.1. ARITHMETIC LOGIC UNIT 58 4.2.2. ALU ARRAY 61 4.3 INTERFACING BLOCKS 63 4.3.1. VOLTAGE-TO-TIME CONVERTER 64 4.3.2. PHASE-FREQUENCY DETECTOR 65 4.3.3. COUNTER BLOCK 66 4.3.4. TIME-TO-VOLTAGE CONVERTER 68 4.4 PROGRAM METHOD 70 CHAPTER 5 MIXED-SIGNAL EXAMPLES AND EXPERIMENTAL RESULTS 73 5.1 MEASUREMENT RESULTS OF TCAB 76 5.1.1. DIGITAL PULSE-WIDTH MODULATOR 76 5.1.2. DIGITALLY-CONTROLLED OSCILLATOR 79 5.1.3. GATED OSCILLATOR 81 5.2 DIGITAL PHASE-LOCKED LOOP 83 5.3 ANALOG-TO-DIGITAL CONVERTER 89 5.4 DCDC CONVERTER 94 CHAPTER 6 CONCLUSION 99 BIBLIOGRAPHY 101 ์ดˆ ๋ก 108Docto
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