Design, analysis and evaluation of sigma-delta based beamformers for medical ultrasound imaging applications

The inherent analogue nature of medical ultrasound signals in conjunction with the abundant merits provided by digital image acquisition, together with the increasing use of relatively simple front-end circuitries, have created considerable demand for single-bit beamformers in digital ultrasound imaging systems. Furthermore, the increasing need to design lightweight ultrasound systems with low power consumption and low noise, provide ample justification for development and innovation in the use of single-bit beamformers in ultrasound imaging systems. The overall aim of this research program is to investigate, establish, develop and confirm through a combination of theoretical analysis and detailed simulations, that utilize raw phantom data sets, suitable techniques for the design of simple-to-implement hardware efficient digital ultrasound beamformers to address the requirements for 3D scanners with large channel counts, as well as portable and lightweight ultrasound scanners for point-of-care applications and intravascular imaging systems. In addition, the stability boundaries of higher-order High-Pass (HP) and Band-Pass (BP) Σ−Δ modulators for single- and dual- sinusoidal inputs are determined using quasi-linear modeling together with the describing-function method, to more accurately model the modulator quantizer. The theoretical results are shown to be in good agreement with the simulation results for a variety of input amplitudes, bandwidths, and modulator orders. The proposed mathematical models of the quantizer will immensely help speed up the design of higher order HP and BP Σ−Δ modulators to be applicable for digital ultrasound beamformers. Finally, a user friendly design and performance evaluation tool for LP, BP and HP modulators is developed. This toolbox, which uses various design methodologies and covers an assortment of modulators topologies, is intended to accelerate the design process and evaluation of modulators. This design tool is further developed to enable the design, analysis and evaluation of beamformer structures including the noise analyses of the final B-scan images. Thus, this tool will allow researchers and practitioners to design and verify different reconstruction filters and analyze the results directly on the B-scan ultrasound images thereby saving considerable time and effort

Multi-Stage Noise-Shaping Continuous-Time Sigma-Delta Modulator

The design of a single-loop continuous-time ∑∆ modulator (CT∑∆M) with high resolution, wide bandwidth, and low power consumption is very challenging. The multi-stage noise-shaping (MASH) CT∑∆M architecture is identified as an advancement to the single-loop CT∑∆M architecture in order to satisfy the ever stringent requirements of next generation wireless systems. However, it suffers from the problems of quantization noise leakage and non-ideal interstage interfacing which hinder its widespread adoption. To solve these issues, this dissertation proposes a MASH CT∑∆M with on-chip RC time constant calibration circuits, multiple feedforward interstage paths, and a fully integrated noise cancellation filter (NCF). The prototype core modulator architecture is a cascade of two single-loop second- order CT∑∆M stages, each of which consists of an integrator-based active-RC loop filter, current-steering feedback digital-to-analog converters, and a four-bit flash quantizer. On-chip RC time constant calibration circuits and high gain multi-stage operational amplifiers are realized to mitigate quantization noise leakage due to process variation. Multiple feedforward interstage paths are introduced to (i) synthesize a fourth-order noise transfer function with DC zeros, (ii) simplify the design of NCF, and (iii) reduce signal swings at the second-stage integrator outputs. Fully integrated in 40 nm CMOS, the prototype chip achieves 74.4 dB of signal-to-noise and distortion ratio (SNDR), 75.8 dB of signal-to-noise ratio, and 76.8 dB of dynamic range in 50.3 MHz of bandwidth (BW) at 1 GHz of sampling frequency with 43.0 mW of power consumption (P). It does not require external software calibration and possesses minimal out-of-band signal transfer function peaking. The figure-of-merit (FOM), defined as FOM = SNDR + 10 log10(BW/P), is 165.1 dB