Simulator Arsitektural Dari Sirkuit Elektronis Guna Tujuan Pembelajaran

The electronic circuit engineering learning processes generally requires specific infrastructures which sometimes constrained to cost factors in the procurement. Circuit simulator could be an alternative as electronic circuit engineering learning tool. Architectural simulation provides designers the ability to quickly examine a wide variety of design choices. The recent trend in system design toward architectures that react to circuit-level phenomena has outstripped the capabilities of traditional cycle-based architectural simulators. In this paper, a simulator that incorporates a circuit modeling capability, permitting architectural-level simulations that react to circuit characteristics (such as latency, energy, power brightness, or current draw) on a cycle-by-cycle basis is presented. As for learning purpose, circuit template and pre-built circuits for many categories are provided. The environment enables process visualization and simulation of analog and digital circuits. The system enables the creation of many laboratory exercises, which offer students opportunities to follow visually characteristic processes in analog and digital circuits. At this research, Rational Unified Process (RUP) software process model and Object Oriented Programming (OOP) are implemented.Keywords: architectural simulation, circuit simulation, learning, RUP, OO

Micro-architecture level low power design for microprocessors

Ph.DDOCTOR OF PHILOSOPH

Microprocessor energy characterization and optimization through fast, accurate, and flexible simulation

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.Includes bibliographical references (p. 99-102).Energy dissipation is emerging as a key constraint for both high-performance and embedded microprocessor designs, requiring computer architects to consider energy in addition to performance when evaluating design decisions. A major limitation is the general difficulty in analyzing the energy impact of architectural and microarchitectural features without constructing detailed implementations and running slow simulations. This thesis first describes the design of a fast, accurate, and flexible circuit simulation tool which enables transition-sensitive studies of microprocessor energy consumption that would otherwise be impossible or impractical. With a simulation infrastructure in place, various optimizations are implemented that target the entire datapath and cache energy consumption. The individual energy optimizations are analyzed in detail, and the microprocessor design is characterized using various energy breakdowns and studies of the bit correlation between data values. This work shows that a few relatively simple energy-saving techniques can have a large impact in the implementation of an energy-efficient microprocessor. By fully characterizing the energy usage, this thesis establishes a coherent vision of microprocessor energy consumption, and serves as a basis and motivation for further energy optimizations.by Ronny Krashinsky.S.M

A Comparison of Two Architectural Power Models

Reducing power, on both a per cycle basis and as the total energy used over the lifetime of an application, has become more important as small and embedded devices become increasingly available. A variety of techniques are available to reduce power, but it is difficult to quantify the benefits of these techniques early in the system design phase when processor architecture is being defined. Accurate tools that allow for exploration of the design space during this phase are crucial. This paper describes our experience with two such tools, the Cai-Lim power model and Wattch, which have been made available to the computer architecture community over the past year. We focu