IMPROVING MULTIBANK MEMORY ACCESS PARALLELISM ON SIMT ARCHITECTURES

Memory mapping has traditionally been an important optimization problem for high-performance parallel systems. Today, these issues are increasingly affecting a much wider range of platforms. Several techniques have been presented to solve bank conflicts and reduce memory access latency but none of them turns out to be generally applicable to different application contexts. One of the ambitious goals of this Thesis is to contribute to modelling the problem of the memory mapping in order to find an approach that generalizes on existing conflict-avoiding techniques, supporting a systematic exploration of feasible mapping schemes

A characterization of one-to-one modular mappings

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A characterization of one-to-one modular mappings

SIGLEAvailable at INIST (FR), Document Supply Service, under shelf-number : RP 13535 / INIST-CNRS - Institut de l'Information Scientifique et TechniqueFRFranc

A characterization of one-to-one modular mappings

In this paper, we deal with modular mappings as introduced by LeeandFortes [14, 13, 12], and we build upon their results. Our main contribution is a characterization of one-to-one modular mappings that is valid even when the source domain and the target domain of the transformation have the same size but not the same shape. This characterization is constructive, and a procedure to test the injectivity of a given transformation is presented

A characterization of one-to-one modular mappings

International audienceno abstrac