A CMOS Monolithic Implementation of a Nonliniear Interconnection Module for a Corticonic Network

A nonlinear interconnection module for a corticonic network is designed and fabricated in a 0.6µm CMOS process. The module uses NMOS transistors in weak-inversion for nonlinearity. A calibration scheme is developed to compensate for the process and temperature variations of the circuit. The designed module has an area of 0.35 sq. mm2. It consumes 200mW of power, with 5V power supply. Simulation results show that the circuit is able to implement the target parametric coupling function accurately

Cort-X II: Low Power Element Design of a Large-Scale Spatio-Temporaral Pattern Clustering System

Complex spatio-temporal patterns can be clustered using a network of parametrically coupled logistic maps. This paper describes the processing element design of such a Cort-X system. Each Cort-X element consists of a non-linear coupling (LC) and a non-linear dynamic element (IRON). The circuits are designed for low-power operation and to be robust against process variations. This has been accomplished by using openloop circuits, and a self-calibration technique that compensate for process variations. The circuits were implemented in a 0.25 um, 2.5V CMOS process and consumes a total of 12mW of power at 1MHz which is about a factor of 20 less power than previous realizations. This opens the possibility for building a large-scale Cort-X system on a chip for the recognition of complex spatio-temporal patterns