A 14-mW PLL-less receiver in 0.18-μm CMOS for Chinese electronic toll collection standard

This is the accepted manuscript version of the following article: Xiaofeng He, et al., “A 14-mW PLL-less receiver in 0.18-μm CMOS for Chinese electronic toll collection standard”, IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 61(10): 763-767, August 2014. The final published version is available at: http://ieeexplore.ieee.org/document/6871304/ © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.The design of a 14-mW receiver without phase-locked loop for the Chinese electronic toll collection (ETC) system in a standard 0.18-μm CMOS process is presented in this brief. Since the previously published work was mainly based on vehicle-powered systems, low power consumption was not the primary goal of such a system. In contrast, the presented system is designed for a battery-powered system. Utilizing the presented receiver architecture, the entire receiver only consumes 7.8 mA, at the supply voltage of 1.8 V, which indicates a power saving of at least 38% compared with other state-of-the-art designs for the same application. To verify the performance, the bit error rate is measured to be better than 10-6, which well satisfies the Chinese ETC standard. Moreover, the sensitivity of the designed receiver can be readjusted to -50 dBm, which is required by the standard.Peer reviewe

SiGe-based broadband and high suppression frequency doubler ICs for wireless communications

制度:新 ; 報告番号:甲3419号 ; 学位の種類:博士(工学) ; 授与年月日:2011/9/15 ; 早大学位記番号:新574

A Fully integrated D-band Direct-Conversion I/Q Transmitter and Receiver Chipset in SiGe BiCMOS Technology

This paper presents design and characterization of single-chip 110-170 GHz (D-band) direct conversion in-phase/quadrature-phase (I/Q) transmitter and receiver monolithic microwave integrated circuits (MMICs), realized in a 130 nm SiGe BiCMOS process with ft/fmax of 250 GHz/370 GHz. The chipset is suitable for low power wideband communication and can be used in both homodyne and heterodyne architectures. The Transmitter chip consists of a six-stage power amplifier, an I/Q modulator, and a LO multiplier chain. The LO multiplier chain consists of frequency sixtupler followed by a two-stage amplifier. It exhibits a single sideband conversion gain of 23 dB and saturated output power of 0 dBm. The 3 dB RF bandwidth is 31 GHz from 114 to 145 GHz. The receiver includes a low noise amplifier, I/Q demodulator and x6 multiplier chain at the LO port. The receiver provides a conversion gain of 27 dB and has a noise figure of 10 dB. It has 3 dB RF bandwidth of 28 GHz from 112-140 GHz. The transmitter and receiver have dc power consumption of 240 mW and 280 mW, respectively. The chip area of each transmitter and receiver circuit is 1.4 mm x 1.1 mm

Concepts for Short Range Millimeter-wave Miniaturized Radar Systems with Built-in Self-Test

This work explores short-range millimeter wave radar systems, with emphasis on miniaturization and overall system cost reduction. The designing and implementation processes, starting from the system level design considerations and characterization of the individual components to final implementation of the proposed architecture are described briefly. Several D-band radar systems are developed and their functionality and performances are demonstrated

Wideband integrated circuits for optical communication systems

The exponential growth of internet traffic drives datacenters to constantly improvetheir capacity. Several research and industrial organizations are aiming towardsTbps Ethernet and beyond, which brings new challenges to the field of high-speedbroadband electronic circuit design. With datacenters rapidly becoming significantenergy consumers on the global scale, the energy efficiency of the optical interconnecttransceivers takes a primary role in the development of novel systems. Furthermore,wideband optical links are finding application inside very high throughput satellite(V/HTS) payloads used in the ever-expanding cloud of telecommunication satellites,enabled by the maturity of the existing fiber based optical links and the hightechnology readiness level of radiation hardened integrated circuit processes. Thereare several additional challenges unique in the design of a wideband optical system.The overall system noise must be optimized for the specific application, modulationscheme, PD and laser characteristics. Most state-of-the-art wideband circuits are builton high-end semiconductor SiGe and InP technologies. However, each technologydemands specific design decisions to be made in order to get low noise, high energyefficiency and adequate bandwidth. In order to overcome the frequency limitationsof the optoelectronic components, bandwidth enhancement and channel equalizationtechniques are used. In this work various blocks of optical communication systems aredesigned attempting to tackle some of the aforementioned challenges. Two TIA front-end topologies with 133 GHz bandwidth, a CB and a CE with shunt-shunt feedback,are designed and measured, utilizing a state-of-the-art 130 nm InP DHBT technology.A modular equalizer block built in 130 nm SiGe HBT technology is presented. Threeultra-wideband traveling wave amplifiers, a 4-cell, a single cell and a matrix single-stage, are designed in a 250 nm InP DHBT process to test the limits of distributedamplification. A differential VCSEL driver circuit is designed and integrated in a4x 28 Gbps transceiver system for intra-satellite optical communications based in arad-hard 130nm SiGe process

Four-element phased-array beamformers and a self-interference canceling full-duplex transciver in 130-nm SiGe for 5G applications at 26 GHz

This thesis is on the design of radio-frequency (RF) integrated front-end circuits for next generation 5G communication systems. The demand for higher data rates and lower latency in 5G networks can only be met using several new technologies including, but not limited to, mm-waves, massive-MIMO, and full-duplex. Use of mm-waves provides more bandwidth that is necessary for high data rates at the cost of increased attenuation in air. Massive-MIMO arrays are required to compensate for this increased path loss by providing beam steering and array gain. Furthermore, full duplex operation is desirable for improved spectrum efficiency and reduced latency. The difficulty of full duplex operation is the self-interference (SI) between transmit (TX) and receive (RX) paths. Conventional methods to suppress this interference utilize either bulky circulators, isolators, couplers or two separate antennas. These methods are not suitable for fully-integrated full-duplex massive-MIMO arrays. This thesis presents circuit and system level solutions to the issues summarized above, in the form of SiGe integrated circuits for 5G applications at 26 GHz. First, a full-duplex RF front-end architecture is proposed that is scalable to massive-MIMO arrays. It is based on blind, RF self-interference cancellation that is applicable to single/shared antenna front-ends. A high resolution RF vector modulator is developed, which is the key building block that empowers the full-duplex frontend architecture by achieving better than state-of-the-art 10-b monotonic phase control. This vector modulator is combined with linear-in-dB variable gain amplifiers and attenuators to realize a precision self-interference cancellation circuitry. Further, adaptive control of this SI canceler is made possible by including an on-chip low-power IQ downconverter. It correlates copies of transmitted and received signals and provides baseband/dc outputs that can be used to adaptively control the SI canceler. The solution comes at the cost of minimal additional circuitry, yet significantly eases linearity requirements of critical receiver blocks at RF/IF such as mixers and ADCs. Second, to complement the proposed full-duplex front-end architecture and to provide a more complete solution, high-performance beamformer ICs with 5-/6- b phase and 3-/4-b amplitude control capabilities are designed. Single-channel, separate transmitter and receiver beamformers are implemented targeting massive- MIMO mode of operation, and their four-channel versions are developed for phasedarray communication systems. Better than state-of-the-art noise performance is obtained in the RX beamformer channel, with a full-channel noise figure of 3.3 d

Millimeter-wave Communication and Radar Sensing — Opportunities, Challenges, and Solutions

With the development of communication and radar sensing technology, people are able to seek for a more convenient life and better experiences. The fifth generation (5G) mobile network provides high speed communication and internet services with a data rate up to several gigabit per second (Gbps). In addition, 5G offers great opportunities of emerging applications, for example, manufacture automation with the help of precise wireless sensing. For future communication and sensing systems, increasing capacity and accuracy is desired, which can be realized at millimeter-wave spectrum from 30 GHz to 300 GHz with several tens of GHz available bandwidth. Wavelength reduces at higher frequency, this implies more compact transceivers and antennas, and high sensing accuracy and imaging resolution. Challenges arise with these application opportunities when it comes to realizing prototype or demonstrators in practice. This thesis proposes some of the solutions addressing such challenges in a laboratory environment.High data rate millimeter-wave transmission experiments have been demonstrated with the help of advanced instrumentations. These demonstrations show the potential of transceiver chipsets. On the other hand, the real-time communication demonstrations are limited to either low modulation order signals or low symbol rate transmissions. The reason for that is the lack of commercially available high-speed analog-to-digital converters (ADCs); therefore, conventional digital synchronization methods are difficult to implement in real-time systems at very high data rates. In this thesis, two synchronous baseband receivers are proposed with carrier recovery subsystems which only require low-speed ADCs [A][B].Besides synchronization, high-frequency signal generation is also a challenge in millimeter-wave communications. The frequency divider is a critical component of a millimeter-wave frequency synthesizer. Having both wide locking range and high working frequencies is a challenge. In this thesis, a tunable delay gated ring oscillator topology is proposed for dual-mode operation and bandwidth extension [C]. Millimeter-wave radar offers advantages for high accuracy sensing. Traditional millimeter-wave radar with frequency-modulated continuous-wave (FMCW), or continuous-wave (CW), all have their disadvantages. Typically, the FMCW radar cannot share the spectrum with other FMCW radars.\ua0 With limited bandwidth, the number of FMCW radars that could coexist in the same area is limited. CW radars have a limited ambiguous distance of a wavelength. In this thesis, a phase-modulated radar with micrometer accuracy is presented [D]. It is applicable in a multi-radar scenario without occupying more bandwidth, and its ambiguous distance is also much larger than the CW radar. Orthogonal frequency-division multiplexing (OFDM) radar has similar properties. However, its traditional fast calculation method, fast Fourier transform (FFT), limits its measurement accuracy. In this thesis, an accuracy enhancement technique is introduced to increase the measurement accuracy up to the micrometer level [E]

Enabling Solutions for Integration and Interconnectivity in Millimeter-wave and Terahertz Systems

Recently, Terahertz (THz) systems have witnessed increasing attention due to the continuous need for high data rate transmission which is mainly driven by next-generation telecommunication and imaging systems. In that regard, the THz range emerged as a potential domain suitable for realizing such systems by providing a wide bandwidth capable of achieving and meeting the market requirements. However, the realization of such systems faces many challenges, one of which is interconnectivity and high level of integration. Conventional packaging techniques would not be suitable from performance perspective above 100 GHz and new approaches need to be developed. This thesis proposes and demonstrates several approaches to implement interconnects that operate above 100 GHz. One of the most attractive techniques discussed in this work is to implement on-chip coupling structures and insert the monolithic microwave integrated circuit (MMIC) directly into a waveguide (WG). Such approach provides high level of integration and eliminates the need of galvanic contacts; however, it suffers from a major drawback which isthe propagation of parasitic modes in the circuit cavity if the MMIC is large enough to allow such modes to propagate. To mitigate this problem, this work suggests and investigates the use of electromagnetic bandgap (EBG) structures that suppresses those modes such as bed of nails and mushroom-type EBG structures. The proposed techniques are used to implement several on-chip packaging solutions that have an insertion loss as low as 0.6 dB at D-band (110-170 GHz). Moreover, the solutions are demonstrated in several active systems using various commercial MMIC technologies. The thesis also investigates the possibility of utilizing the commercially available packaging technologies such as Embedded Wafer Level Ball Grid Array (eWLB) packaging. Such technology has been widely used for integrated circuits operating below 100 GHz but was not attempted in the THz range before. This work attempts to push the limits of the technology and proposes novel solutions based on coupling structures implemented in the technology’s redistribution layers. The proposed solutions achieve reasonable performance at D-band that are suitable for low-cost mass production while allowing heterogeneous integration with other technologies as well. This work addresses integration challenges facing systems operating in the THz range and proposes high-performance interconnectivity solutions demonstrated in a wide range of commercial technologies and hence enables such systems to reach their full potential and meet the increasing market demands