Time-Sliced Quantum Circuit Partitioning for Modular Architectures

Current quantum computer designs will not scale. To scale beyond small prototypes, quantum architectures will likely adopt a modular approach with clusters of tightly connected quantum bits and sparser connections between clusters. We exploit this clustering and the statically-known control flow of quantum programs to create tractable partitioning heuristics which map quantum circuits to modular physical machines one time slice at a time. Specifically, we create optimized mappings for each time slice, accounting for the cost to move data from the previous time slice and using a tunable lookahead scheme to reduce the cost to move to future time slices. We compare our approach to a traditional statically-mapped, owner-computes model. Our results show strict improvement over the static mapping baseline. We reduce the non-local communication overhead by 89.8\% in the best case and by 60.9\% on average. Our techniques, unlike many exact solver methods, are computationally tractable.Comment: Appears in CF'20: ACM International Conference on Computing Frontier

Optimized Surface Code Communication in Superconducting Quantum Computers

Quantum computing (QC) is at the cusp of a revolution. Machines with 100 quantum bits (qubits) are anticipated to be operational by 2020 [googlemachine,gambetta2015building], and several-hundred-qubit machines are around the corner. Machines of this scale have the capacity to demonstrate quantum supremacy, the tipping point where QC is faster than the fastest classical alternative for a particular problem. Because error correction techniques will be central to QC and will be the most expensive component of quantum computation, choosing the lowest-overhead error correction scheme is critical to overall QC success. This paper evaluates two established quantum error correction codes---planar and double-defect surface codes---using a set of compilation, scheduling and network simulation tools. In considering scalable methods for optimizing both codes, we do so in the context of a full microarchitectural and compiler analysis. Contrary to previous predictions, we find that the simpler planar codes are sometimes more favorable for implementation on superconducting quantum computers, especially under conditions of high communication congestion.Comment: 14 pages, 9 figures, The 50th Annual IEEE/ACM International Symposium on Microarchitectur

Optimal Quantum Circuits for Nearest-Neighbor Architectures

We show that the depth of quantum circuits in the realistic architecture where a classical controller determines which local interactions to apply on the kD grid Z^k where k >= 2 is the same (up to a constant factor) as in the standard model where arbitrary interactions are allowed. This allows minimum-depth circuits (up to a constant factor) for the nearest-neighbor architecture to be obtained from minimum-depth circuits in the standard abstract model. Our work therefore justifies the standard assumption that interactions can be performed between arbitrary pairs of qubits. In particular, our results imply that Shor's algorithm, controlled operations and fanouts can be implemented in constant depth, polynomial size and polynomial width in this architecture. We also present optimal non-adaptive quantum circuits for controlled operations and fanouts on a kD grid. These circuits have depth Theta(n^(1 / k)), size Theta(n) and width Theta(n). Our lower bound also applies to a more general class of operations.Comment: 24 pages, 6 figures. v1 introduces all the results. v2 and v3 make minor improvements to the presentation and add additional reference

Noise-Adaptive Compiler Mappings for Noisy Intermediate-Scale Quantum Computers

A massive gap exists between current quantum computing (QC) prototypes, and the size and scale required for many proposed QC algorithms. Current QC implementations are prone to noise and variability which affect their reliability, and yet with less than 80 quantum bits (qubits) total, they are too resource-constrained to implement error correction. The term Noisy Intermediate-Scale Quantum (NISQ) refers to these current and near-term systems of 1000 qubits or less. Given NISQ's severe resource constraints, low reliability, and high variability in physical characteristics such as coherence time or error rates, it is of pressing importance to map computations onto them in ways that use resources efficiently and maximize the likelihood of successful runs. This paper proposes and evaluates backend compiler approaches to map and optimize high-level QC programs to execute with high reliability on NISQ systems with diverse hardware characteristics. Our techniques all start from an LLVM intermediate representation of the quantum program (such as would be generated from high-level QC languages like Scaffold) and generate QC executables runnable on the IBM Q public QC machine. We then use this framework to implement and evaluate several optimal and heuristic mapping methods. These methods vary in how they account for the availability of dynamic machine calibration data, the relative importance of various noise parameters, the different possible routing strategies, and the relative importance of compile-time scalability versus runtime success. Using real-system measurements, we show that fine grained spatial and temporal variations in hardware parameters can be exploited to obtain an average $2.9$x (and up to $18$x) improvement in program success rate over the industry standard IBM Qiskit compiler.Comment: To appear in ASPLOS'1

Optimal State Transfer and Entanglement Generation in Power-law Interacting Systems

We present an optimal protocol for encoding an unknown qubit state into a multiqubit Greenberger-Horne-Zeilinger-like state and, consequently, transferring quantum information in large systems exhibiting power-law ($1/r^\alpha$) interactions. For all power-law exponents $\alpha$ between $d$ and $2d+1$, where $d$ is the dimension of the system, the protocol yields a polynomial speedup for $\alpha>2d$ and a superpolynomial speedup for $\alpha\leq 2d$, compared to the state of the art. For all $\alpha>d$, the protocol saturates the Lieb-Robinson bounds (up to subpolynomial corrections), thereby establishing the optimality of the protocol and the tightness of the bounds in this regime. The protocol has a wide range of applications, including in quantum sensing, quantum computing, and preparation of topologically ordered states. In addition, the protocol provides a lower bound on the gate count in digital simulations of power-law interacting systems.Comment: Updated Table I, Additional discussion on a lower bound for the gate count in digital quantum simulatio

Exploiting Quantum Teleportation in Quantum Circuit Mapping

Quantum computers are constantly growing in their number of qubits, but continue to suffer from restrictions such as the limited pairs of qubits that may interact with each other. Thus far, this problem is addressed by mapping and moving qubits to suitable positions for the interaction (known as quantum circuit mapping). However, this movement requires additional gates to be incorporated into the circuit, whose number should be kept as small as possible since each gate increases the likelihood of errors and decoherence. State-of-the-art mapping methods utilize swapping and bridging to move the qubits along the static paths of the coupling map---solving this problem without exploiting all means the quantum domain has to offer. In this paper, we propose to additionally exploit quantum teleportation as a possible complementary method. Quantum teleportation conceptually allows to move the state of a qubit over arbitrary long distances with constant overhead---providing the potential of determining cheaper mappings. The potential is demonstrated by a case study on the IBM Q Tokyo architecture which already shows promising improvements. With the emergence of larger quantum computing architectures, quantum teleportation will become more effective in generating cheaper mappings.Comment: To appear in ASP-DAC 202