16 research outputs found
Integrated Circuit and Antenna Technology for Millimeter-wave Phased Array Radio Front-end
Ever growing demands for higher data rate and bandwidth are pushing extremely high data rate wireless applications to millimeter-wave band (30-300GHz), where sufficient bandwidth is available and high data rate wireless can be achieved without using complex modulation schemes. In addition to the communication applications, millimeter-wave band has enabled novel short range and long range radar sensors for automotive as well as high resolution imaging systems for medical and security. Small size, high gain antennas, unlicensed and worldwide availability of released bands for communication and a number of other applications are other advantages of the millimeter-wave band.
The major obstacle for the wide deployment of commercial wireless and radar systems in this frequency range is the high cost and bulky nature of existing GaAs- and InP-based solutions. In recent years, with the rapid scaling and development of the silicon-based integrated circuit technologies such as CMOS and SiGe, low cost technologies have shown acceptable millimeter-wave performance, which can enable highly integrated millimeter-wave radio devices and reduce the cost significantly. Furthermore, at this range of frequencies, on-chip antenna becomes feasible and can be considered as an attractive solution that can further reduce the cost and complexity of the radio package.
The propagation channel challenges for the realization of low cost and reliable silicon-based communication devices at millimeter-wave band are severe path loss as well as shadowing loss of human body. Silicon technology challenges are low-Q passive components, low breakdown voltage of active devices, and low efficiency of on-chip antennas.
The main objective of this thesis is to investigate and to develop antenna and front-end for cost-effective silicon based millimeter-wave phased array radio architectures that can address above challenges for short range, high data rate wireless communication as well as radar applications. Although the proposed concepts and the results obtained in this research are general, as an important example, the application focus in this research is placed on the radio aspects of emerging 60 GHz communication system. For this particular but extremely important case, various aspects of the technology including standard, architecture, antenna options and indoor propagation channel at presence of a human body are studied.
On-chip dielectric resonator antenna as a radiation efficiency improvement technique for an on-chip antenna on low resistivity silicon is presented, developed and proved by measurement. Radiation efficiency of about 50% was measured which is a significant improvement in the radiation efficiency of on-chip antennas. Also as a further step, integration of the proposed high efficiency antenna with an amplifier in transmit and receive configurations at 30 GHz is successfully demonstrated. For the implementation of a low cost millimeter-wave array antenna, miniaturized, and efficient antenna structures in a new integrated passive device technology using high resistivity silicon are designed and developed.
Front-end circuit blocks such as variable gain LNA, continuous passive and active phase shifters are investigated, designed and developed for a 60GHz phased array radio in CMOS technology. Finally, two-element CMOS phased array front-ends based on passive and active phase shifting architectures are proposed, developed and compared
Broadband RF Front-End Design for Multi-Standard Receiver with High-Linearity and Low-Noise Techniques
Future wireless communication devices must support multiple standards and features on a single-chip. The trend towards software-defined radio requires flexible and efficient RF building blocks which justifies the adoption of broadband receiver front-ends in modern and future communication systems. The broadband receiver front-end significantly reduces cost, area, pins, and power, and can process several signal channels simultaneously. This research is mainly focused on the analysis and realization of the broadband receiver architecture and its various building blocks (LNA, Active Balun-LNA, Mixer, and trans-impedance amplifier) for multi-standard applications.
In the design of the mobile DTV tuner, a direct-conversion receiver architecture is adopted achieving low power, low cost, and high dynamic-range for DVB-H standard. The tuner integrates a single-ended RF variable gain amplifier (RFVGA), a current-mode passive mixer, and a combination of continuous and discrete-time baseband filter with built-in anti-aliasing. The proposed RFVGA achieves high dynamic-range and gain-insensitive input impedance matching performance. The current-mode passive mixer achieves high gain, low noise, and high linearity with low power supplies.
A wideband common-gate LNA is presented that overcomes the fundamental trade-off between power and noise match without compromising its stability. The proposed architecture can achieve the minimum noise figure over the previously reported feedback amplifiers in common-gate configuration. The proposed architecture achieves broadband impedance matching, low noise, large gain, enhanced linearity, and wide bandwidth concurrently by employing an efficient and reliable dual negative-feedback.
For the wideband Inductorless Balun-LNA, active single-to-differential architecture has been proposed without using any passive inductor on-chip which occupies a lot of silicon area. The proposed Balun-LNA features lower power, wider bandwidth, and better gain and phase balance than previously reported architectures of the same kind.
A surface acoustic wave (SAW)-less direct conversion receiver targeted for multistandard applications is proposed and fabricated with TSMC 0.13?m complementary metal-oxide-semiconductor (CMOS) technology. The target is to design a wideband SAW-less direct coversion receiver with a single low noise transconductor and current-mode passive mixer with trans-impedance amplifier utilizing feed-forward compensation. The innovations in the circuit and architecture improves the receiver dynamic range enabling highly linear direct-conversion CMOS front-end for a multi-standard receiver
Simulation and Design of an UWB Imaging System for Breast Cancer Detection
Breast cancer is the most frequently diagnosed cancer among women. In recent
years, the mortality rate due to this disease is greatly decreased thanks to both
enormous progress in cancer research, and screening campaigns which have allowed
the increase in the number of early diagnoses of the disease. In fact, if the tumor is
identied in its early stage, e.g. when it has a diameter of less than one centimeter,
the possibility of a cure can reach 93%. However, statistics show that more young
aged women are suered breast cancer.
The goal of screening exams for early breast cancer detection is to nd cancers
before they start to cause symptoms. Regular mass screening of all women at risk
is a good option to achieve that. Instead of meeting very high diagnostic standards,
it is expected to yield an early warning, not a denitive diagnosis. In the last
decades, X-ray mammography is the most ecient screening technique. However,
it uses ionizing radiation and, therefore, should not be used for frequent check-ups.
Besides, it requires signicant breast compression, which is often painful. In this
scenario many alternative technologies were developed to overcome the limitations
of mammography. Among these possibilities, Magnetic Resonance Imaging (MRI)
is too expensive and time-consuming, Ultrasound is considered to be too operatordependent
and low specicity, which are not suitable for mass screening. Microwave
imaging techniques, especially Ultra WideBand (UWB) radar imaging, is the most
interesting one. The reason of this interest relies on the fact that microwaves are
non-ionizing thus permitting frequent examinations. Moreover, it is potentially lowcost
and more ecient for young women. Since it has been demonstrated in the
literatures that the dielectric constants between cancerous and healthy tissues are
quite dierent, the technique consists in illuminating these biological tissues with
microwave radiations by one or more antennas and analyzing the re
ected signals.
An UWB imaging system consists of transmitters, receivers and antennas for
the RF part, the transmission channel and of a digital backend imaging unit for
processing the received signals. When an UWB pulse strikes the breast, the pulse is
re
ected due to the dielectric discontinuity in tissues, the bigger the dierence, the
bigger the backscatter. The re
ected signals are acquired and processed to create
the energy maps. This thesis aims to develop an UWB system at high resolution for the detection of carcinoma breast already in its initial phase. To favor the adoption
of this method in screening campaigns, it is necessary to replace the expensive and
bulky RF instrumentation used so far with ad-hoc designed circuits and systems.
In order to realize that, at the very beginning, the overall system environment must
be built and veried, which mainly consists of the transmission channel{the breast
model and the imaging unit. The used transmission channel data come from MRI
of the prone patient. In order to correctly use this numerical model, a simulator was
built, which was implemented in Matlab, according to the Finite-Dierence-Time-
Domain (FDTD) method. FDTD algorithm solves the electric and magnetic eld
both in time and in space, thus, simulates the propagation of electromagnetic waves
in the breast model. To better understand the eect of the system non-idealities,
two 2D breast models are investigated, one is homogeneous, the other is heterogeneous.
Moreover, the modeling takes into account all critical aspects, including
stability and medium dispersion. Given the types of tissues under examination, the
frequency dependence of tissue dielectric properties is incorporated into wideband
FDTD simulations using Debye dispersion parameters. A performed further study
is in the implementation of the boundary conditions. The Convolution Perfectly
Matched Layer (CPML) is used to implement the absorbing boundaries.
The objective of the imaging unit is to obtain an energy map representing the
amount of energy re
ected from each point of the breast, by recombining the sampled
backscattered signals. For this purpose, the study has been carried out on various
beamforming in the literature. The basic idea is called as "delay and sum", which
is to align the received signals in such a way as to focus a given point in space and
then add up all the contributions, so as to obtain a constructive interference at that
point if this is a diseased tissue. In this work, Microwave Imaging via Space Time
(MIST) Beamforming algorithm is applied, which is based on the above principle
and add more elaborations of the signals in order to make the algorithm less sensitive
to propagation phenomena in the medium and to the non-idealities of the system.
It is divided into two distinct steps: the rst step, called SKin Artifact Removal
(SKAR), takes care of removing the contributions from the signal caused by the
direct path between the transmitter and receiver, the re
ection of skin, as they are
orders of magnitude higher compared to the re
ections caused by cancers; the second
step, which is BEAmForming (BEAF), performs the algorithm of reconstruction by
forming a weighted combination of time delayed version of the calibrated re
ected
signals.
As discussed above, more attention must be paid on the implementation of the
ad-hoc integration circuits. In this scenario, due to the strict requirements on the
RF receiver component, two dierent approaches of the implementation of the RF
front-end, Direct Conversion (DC) receiver and Coherent Equivalent Time Sampling
(CETS) receiver are compared. They are modeled behaviorally and the eects of
various impairments, such as thermal, jitter, and phase noise, as well as phase inaccuracies, non-linearity, ADC quantization noise and distortion, on energy maps
and on quantitative metrics such as SCR and SMR are evaluated. Dierential
Gaussian pulse is chosen as the exciting source. Results show that DC receiver
performs higher sensitivity to phase inaccuracies, which makes it less robust than
the CETS receiver. Another advantage of the CETS receiver is that it can work
in time domain with UWB pulses, other than in frequency domain with stepped
frequency continuous waves like the DC one, which reduces the acquisition time
without impacting the performance.
Based on the results of the behavioral simulations, low noise amplier (LNA)
and Track and Hold Amplier (THA) can be regarded as the most critical parts
for the proposed CETS receiver, as well as the UWB antenna. This work therefore
focuses on their hardware implementations. The LNA, which shows critical performance
limitation at bandwidth and noise gure of receiver, has been developed based
on common-gate conguration. And the THA based on Switched Source Follower
(SSF) scheme has been presented and improved to obtain high input bandwidth,
high sampling rate, high linearity and low power consumption. LNA and THA
are implemented in CMOS 130nm technology and the circuit performance evaluation
has been taken place separately and together. The small size UWB wide-slot
antenna is designed and simulated in HFSS.
Finally, in order to evaluate the eect of the implemented transistor level components
on system performance, a multi-resolution top-down system methodology
is applied. Therfore, the entire
ow is analyzed for dierent levels of the RF frontend.
Initially the system components are described behaviorally as ideal elements.
The main activity consists in the analysis and development of the entire frontend
system, observing and complementing each other blocks in a single
ow simulation,
clear and well-dened in its various interfaces. To achieve that the receiver is modeled
and analyzed using VHDL-AMS language block by block, moreover, the impact
of quantization, noise, jitter, and non-linearity is also evaluated. At last, the behavioral
description of antenna, LNA and THA is replaced with a circuit-level one
without changing the rest of the system, which permits a system-level assessment
of low-level issues
High Frequency Receiver Front-End Module for Active Antenna Applications
This research is based on the analysis and development of an integrated receiver front-end module for high gain active antenna systems at the K-band (20GHz). In the design of conventional satellite receivers (such as reflector antennas), the system is usually specified by the gain/directivity, gain-to-temperature ratio (G/T) and radiation pattern requirements. The challenge in high gain active antenna systems development, in addition to beam-forming/beam-steering requirements, is to develop transmit/receive modules which will meet the power, noise and radiation pattern requirements of the conventional antenna. In order to guarantee an optimal design, it is important to be able to translate the specifications from the system level to the transistor level. The focus is on the development of a single-channel CMOS-based integrated receiver module.
The G/T requirement is analysed to derive the noise figure and gain specifications for the low noise amplifier(LNA). An LNA design in 65nm CMOS is demonstrated to achieve a 2.6dB noise figure and uses only 7mW of DC power. The digital phased shifter specifications are studied. The generation of "quantization lobes" is analysed and used to estimate the number of bits based on side-lobe level requirements. The design of a 5-bit digital phase shifter based on quadrature signal modulation and a unique digital control logic is presented and tested at 20GHz. The phase shifter is shown to achieve 10dB input and output return loss between 16-21GHz. The effect of pattern tapering on the side-lobe level is investigated and used to specify the minimum dynamic range for a variable gain amplifier (VGA). A VGA design is demonstrated to meet this dynamic range with low phase-frequency variation.
A schematic level design of the proposed single-channel array is studied featuring a hybrid coupler and switch for polarisation requirements, as well as a low-voltage bandgap reference circuit. Simulations results verify that the receiver can be used to generate two hands of polarisation (right and left) with <1.1dB axial ratio
Integrated Antennas and Active Beamformers Technology for mm-Wave Phased-Array Systems
In this thesis, based on the indoor channel measurements and ray-tracing
modeling for the indoor mm-wave wireless communications, the challenges
of the design of the radio in this band is studied. Considering the recently developed standards such as IEEE 802.15.3c, ECMA and WiGig at 60 GHz, the link budget of the system design for different classes of operation is done and the requirement for the antenna and other RF sections are extracted. Based on radiation characteristics of mm-wave and the fundamental limits of low-cost Silicon technology, it is shown that phased-array is the ultimate solution for the radio and physical layer of the mobile millimeter wave multi-Gb/s wireless networks. Different phased-array configurations are studied and a low-cost single-receiver array architecture with RF phase-shifting is proposed. A systematic approach to the analysis of the overall noise-figure of the proposed architecture is presented and the component technical requirements are derived for the system level specifications. The proposed on-chip antennas and antenna-in-packages for various applications are designed and verified by the measurement results. The design of patch antennas on the low-cost RT/Duroid substrate and the slot antennas on the IPD technologies as well as the compact on-chip slot DRA antenna are explained in the antenna design section. The design of reflective-type phase shifters in CMOS and MEMS technologies is explained. Finally, the design details of two developed 60 GHz integrated phased-arrays in CMOS technology are discussed. Front-end circuit blocks such as LNA, continuous passive reflective-type phase shifters, power combiner and variable gain amplifiers are investigated, designed and developed for a 60 GHz phased-array radio in CMOS technology. In the first design, the two-element CMOS phased-array front-ends based on passive phase shifting architecture is proposed and developed. In the second phased-array, the recently developed on-chip dielectric resonator antenna in our group in lower frequency is scaled and integrated with the front-end
High Performance RF and Basdband Analog-to-Digital Interface for Multi-standard/Wideband Applications
The prevalence of wireless standards and the introduction of dynamic
standards/applications, such as software-defined radio, necessitate the next generation
wireless devices that integrate multiple standards in a single chip-set to support a variety
of services. To reduce the cost and area of such multi-standard handheld devices,
reconfigurability is desirable, and the hardware should be shared/reused as much as
possible. This research proposes several novel circuit topologies that can meet various
specifications with minimum cost, which are suited for multi-standard applications. This
doctoral study has two separate contributions: 1. The low noise amplifier (LNA) for the
RF front-end; and 2. The analog-to-digital converter (ADC).
The first part of this dissertation focuses on LNA noise reduction and linearization
techniques where two novel LNAs are designed, taped out, and measured. The first LNA,
implemented in TSMC (Taiwan Semiconductor Manufacturing Company) 0.35Cm
CMOS (Complementary metal-oxide-semiconductor) process, strategically combined an
inductor connected at the gate of the cascode transistor and the capacitive cross-coupling
to reduce the noise and nonlinearity contributions of the cascode transistors. The proposed technique reduces LNA NF by 0.35 dB at 2.2 GHz and increases its IIP3 and
voltage gain by 2.35 dBm and 2dB respectively, without a compromise on power
consumption. The second LNA, implemented in UMC (United Microelectronics
Corporation) 0.13Cm CMOS process, features a practical linearization technique for
high-frequency wideband applications using an active nonlinear resistor, which obtains a
robust linearity improvement over process and temperature variations. The proposed
linearization method is experimentally demonstrated to improve the IIP3 by 3.5 to 9 dB
over a 2.5–10 GHz frequency range. A comparison of measurement results with the prior
published state-of-art Ultra-Wideband (UWB) LNAs shows that the proposed linearized
UWB LNA achieves excellent linearity with much less power than previously published
works.
The second part of this dissertation developed a reconfigurable ADC for multistandard
receiver and video processors. Typical ADCs are power optimized for only one
operating speed, while a reconfigurable ADC can scale its power at different speeds,
enabling minimal power consumption over a broad range of sampling rates. A novel
ADC architecture is proposed for programming the sampling rate with constant biasing
current and single clock. The ADC was designed and fabricated using UMC 90nm
CMOS process and featured good power scalability and simplified system design. The
programmable speed range covers all the video formats and most of the wireless
communication standards, while achieving comparable Figure-of-Merit with customized
ADCs at each performance node. Since bias current is kept constant, the reconfigurable
ADC is more robust and reliable than the previous published works